ATmega8 (961722), страница 45
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Boot Size ConfigurationBootSizePagesApplicationFlashSectionBootLoaderFlashSectionEndApplicationSectionBoot ResetAddress(Start BootLoaderSection)BOOTSZ1BOOTSZ011128words40x000 0xF7F0xF80 0xFFF0xF7F0xF8010256words80x000 0xEFF0xF00 0xFFF0xEFF0xF0001512words160x000 0xDFF0xE00 0xFFF0xDFF0xE00001024words320x000 0xBFF0xC00 0xFFF0xBFF0xC002172486O–AVR–10/04Note:The different BOOTSZ Fuse configurations are shown in Figure 102.Table 83. Read-While-Write LimitSectionPagesAddressRead-While-Write section (RWW)960x000 - 0xBFFNo Read-While-Write section (NRWW)320xC00 - 0xFFFFor details about these two section, see “NRWW – No Read-While-Write Section” onpage 207 and “RWW – Read-While-Write Section” on page 207Table 84.
Explanation of Different Variables used in Figure 103 and the Mapping to theZ-pointerCorrespondingZ-value(1)VariablePCMSB11Most significant bit in the Program Counter.(The Program Counter is 12 bits PC[11:0])PAGEMSB4Most significant bit which is used to address thewords within one page (32 words in a pagerequires 5 bits PC [4:0]).ZPCMSBZ12Bit in Z-register that is mapped to PCMSB.Because Z0 is not used, the ZPCMSB equalsPCMSB + 1.ZPAGEMSBZ5Bit in Z-register that is mapped to PAGEMSB.Because Z0 is not used, the ZPAGEMSBequals PAGEMSB + 1.PCPAGEPC[11:5]Z12:Z6Program counter page address: Page select,for page erase and page writePCWORDPC[4:0]Z5:Z1Program counter word address: Word select, forfilling temporary buffer (must be zero duringpage write operation)Note:218Description1.
Z15:Z13: always ignoredZ0: should be zero for all SPM commands, byte select for the LPM instruction.See “Addressing the Flash During Self-Programming” on page 211 for details aboutthe use of Z-pointer during Self-Programming.ATmega8(L)2486O–AVR–10/04ATmega8(L)MemoryProgrammingProgram And DataMemory Lock BitsThe ATmega8 provides six Lock Bits which can be left unprogrammed (“1”) or can beprogrammed (“0”) to obtain the additional features listed in Table 86. The Lock Bits canonly be erased to “1” with the Chip Erase command.Table 85. Lock Bit ByteDescriptionDefault Value(1)7–1 (unprogrammed)6–1 (unprogrammed)BLB125Boot lock bit1 (unprogrammed)BLB114Boot lock bit1 (unprogrammed)BLB023Boot lock bit1 (unprogrammed)BLB012Boot lock bit1 (unprogrammed)LB21Lock bit1 (unprogrammed)LB10Lock bit1 (unprogrammed)Lock Bit ByteNote:Bit No.1. “1” means unprogrammed, “0” means programmedTable 86.
Lock Bit Protection Modes(2)Memory Lock BitsProtection TypeLB ModeLB2LB1111No memory lock features enabled.0Further programming of the Flash and EEPROM isdisabled in Parallel and Serial Programming mode. TheFuse Bits are locked in both Serial and ParallelProgramming mode.(1)Further programming and verification of the Flash andEEPROM is disabled in parallel and Serial Programmingmode. The Fuse Bits are locked in both Serial and ParallelProgramming modes.(1)21300BLB0 ModeBLB02BLB01111No restrictions for SPM or LPM accessing the Applicationsection.210SPM is not allowed to write to the Application section.0SPM is not allowed to write to the Application section, andLPM executing from the Boot Loader section is notallowed to read from the Application section.
If InterruptVectors are placed in the Boot Loader section, interruptsare disabled while executing from the Application section.LPM executing from the Boot Loader section is notallowed to read from the Application section. If InterruptVectors are placed in the Boot Loader section, interruptsare disabled while executing from the Application section.30401BLB1 ModeBLB12BLB112192486O–AVR–10/04Table 86. Lock Bit Protection Modes(2) (Continued)Memory Lock Bits111No restrictions for SPM or LPM accessing the Boot Loadersection.210SPM is not allowed to write to the Boot Loader section.0SPM is not allowed to write to the Boot Loader section,and LPM executing from the Application section is notallowed to read from the Boot Loader section.
If InterruptVectors are placed in the Application section, interruptsare disabled while executing from the Boot Loader section.1LPM executing from the Application section is not allowedto read from the Boot Loader section. If Interrupt Vectorsare placed in the Application section, interrupts aredisabled while executing from the Boot Loader section.304Notes:Fuse BitsProtection Type01. Program the Fuse Bits before programming the Lock Bits.2. “1” means unprogrammed, “0” means programmedThe ATmega8 has two fuse bytes.
Table 87 and Table 88 describe briefly the functionality of all the fuses and how they are mapped into the fuse bytes. Note that the fuses areread as logical zero, “0”, if they are programmed.Table 87. Fuse High ByteFuse HighByteBitNo.RSTDISBL(4)7WDTON6SPIEN(1)DescriptionDefault ValueSelect if PC6 is I/O pin or RESET pin1 (unprogrammed, PC6 isRESET-pin)WDT always on1 (unprogrammed, WDTenabled by WDTCR)5Enable Serial Program and DataDownloading0 (programmed, SPI prog.enabled)CKOPT(2)4Oscillator options1 (unprogrammed)EESAVE3EEPROM memory is preservedthrough the Chip Erase1 (unprogrammed,EEPROM not preserved)BOOTSZ12Select Boot Size (see Table 82 fordetails)0 (programmed)(3)BOOTSZ01Select Boot Size (see Table 82 fordetails)0 (programmed)(3)BOOTRST0Select Reset Vector1 (unprogrammed)Notes:2201.
The SPIEN Fuse is not accessible in Serial Programming mode.2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits, see “ClockSources” on page 24 for details.3. The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 82 onpage 217.4. When programming the RSTDISBL Fuse Parallel Programming has to be used tochange fuses or perform further programming.ATmega8(L)2486O–AVR–10/04ATmega8(L)Table 88.
Fuse Low ByteFuse LowByteBitNo.BODLEVELDescriptionDefault Value7Brown out detector trigger level1 (unprogrammed)BODEN6Brown out detector enable1 (unprogrammed, BOD disabled)SUT15Select start-up time1 (unprogrammed)(1)SUT04Select start-up time0 (programmed)(1)CKSEL33Select Clock source0 (programmed)(2)CKSEL22Select Clock source0 (programmed)(2)CKSEL11Select Clock source0 (programmed)(2)CKSEL00Select Clock source1 (unprogrammed)(2)Notes:1. The default value of SUT1..0 results in maximum start-up time. SeeTable 10 on page28 for details.2.
The default setting of CKSEL3..0 results in internal RC Oscillator @ 1MHz. SeeTable 2 on page 24 for details.The status of the Fuse Bits is not affected by Chip Erase. Note that the Fuse Bits arelocked if lock bit1 (LB1) is programmed. Program the Fuse Bits before programming theLock Bits.Latching of FusesThe fuse values are latched when the device enters Programming mode and changes ofthe fuse values will have no effect until the part leaves Programming mode. This doesnot apply to the EESAVE Fuse which will take effect once it is programmed.
The fusesare also latched on Power-up in Normal mode.2212486O–AVR–10/04Signature BytesAll Atmel microcontrollers have a 3-byte signature code which identifies the device. Thiscode can be read in both Serial and Parallel mode, also when the device is locked. Thethree bytes reside in a separate address space.For the ATmega8 the signature bytes are:1. 0x000: 0x1E (indicates manufactured by Atmel).2. 0x001: 0x93 (indicates 8KB Flash memory).3. 0x002: 0x07 (indicates ATmega8 device).Calibration ByteThe ATmega8 stores four different calibration values for the internal RC Oscillator.These bytes resides in the signature row High byte of the addresses 0x0000, 0x0001,0x0002, and 0x0003 for 1, 2, 4, and 8 Mhz respectively.
During Reset, the 1 MHz valueis automatically loaded into the OSCCAL Register. If other frequencies are used, thecalibration value has to be loaded manually, see “Oscillator Calibration Register – OSCCAL” on page 29 for details.Page SizeTable 89. No. of Words in a Page and no. of Pages in the FlashFlash Size4K words (8K bytes)Page SizePCWORDNo. of PagesPCPAGEPCMSB32 wordsPC[4:0]128PC[11:5]11Table 90. No. of Words in a Page and no. of Pages in the EEPROM222EEPROM SizePage SizePCWORDNo. of PagesPCPAGEEEAMSB512 bytes4 bytesEEA[1:0]128EEA[8:2]8ATmega8(L)2486O–AVR–10/04ATmega8(L)Parallel ProgrammingParameters, PinMapping, andCommandsThis section describes how to parallel program and verify Flash Program memory,EEPROM Data memory, Memory Lock Bits, and Fuse Bits in the ATmega8. Pulses areassumed to be at least 250 ns unless otherwise noted.Signal NamesIn this section, some pins of the ATmega8 are referenced by signal names describingtheir functionality during parallel programming, see Figure 104 and Table 91.
Pins notdescribed in the following table are referenced by pin names.The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit coding is shown in Table 93.When pulsing WR or OE, the command loaded determines the action executed. The different Commands are shown in Table 94.Figure 104.
Parallel Programming+5VRDY/BSYPD1OEPD2WRPD3BS1PD4XA0PD5XA1PD6PAGELPD7+12 VVCC+5VAVCCPC[1:0]:PB[5:0]DATARESETBS2PC2XTAL1GNDTable 91. Pin Name MappingSignal Name inProgramming ModePin NameI/OFunctionRDY/BSYPD1O0: Device is busy programming, 1: Deviceis ready for new commandOEPD2IOutput Enable (Active low)WRPD3IWrite Pulse (Active low)BS1PD4IByte Select 1 (“0” selects Low byte, “1”selects High byte)XA0PD5IXTAL Action Bit 0XA1PD6IXTAL Action Bit 12232486O–AVR–10/04Table 91. Pin Name Mapping (Continued)Signal Name inProgramming ModePin NameI/OFunctionPAGELPD7IProgram memory and EEPROM DataPage LoadBS2PC2IByte Select 2 (“0” selects Low byte, “1”selects 2’nd High byte)DATA{PC[1:0]: PB[5:0]}I/OBi-directional Data bus (Output when OE islow)Table 92.
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