ATmega8 (961722), страница 43
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To re-enable the RWWsection, the user software must wait until the programming is completed (SPMEN will becleared). Then, if the RWWSRE bit is written to one at the same time as SPMEN, thenext SPM instruction within four clock cycles re-enables the RWW section. The RWWsection cannot be re-enabled while the Flash is busy with a page erase or a page write(SPMEN is set). If the RWWSRE bit is written while the Flash is being loaded, the Flashload operation will abort and the data loaded will be lost (The page buffer will be clearedwhen the Read-While-Write section is re-enabled).• Bit 3 – BLBSET: Boot Lock Bit SetIf this bit is written to one at the same time as SPMEN, the next SPM instruction withinfour clock cycles sets Boot Lock Bits, according to the data in R0.
The data in R1 andthe address in the Z-pointer are ignored. The BLBSET bit will automatically be clearedupon completion of the lock bit set, or if no SPM instruction is executed within four clockcycles.An LPM instruction within three cycles after BLBSET and SPMEN are set in the SPMCRRegister, will read either the Lock Bits or the Fuse Bits (depending on Z0 in the Zpointer) into the destination register. See “Reading the Fuse and Lock Bits from Software” on page 214 for details.• Bit 2 – PGWRT: Page Write210ATmega8(L)2486O–AVR–10/04ATmega8(L)If this bit is written to one at the same time as SPMEN, the next SPM instruction withinfour clock cycles executes page write, with the data stored in the temporary buffer. Thepage address is taken from the high part of the Z-pointer.
The data in R1 and R0 areignored. The PGWRT bit will auto-clear upon completion of a page write, or if no SPMinstruction is executed within four clock cycles. The CPU is halted during the entire pagewrite operation if the NRWW section is addressed.• Bit 1 – PGERS: Page EraseIf this bit is written to one at the same time as SPMEN, the next SPM instruction withinfour clock cycles executes page erase. The page address is taken from the high part ofthe Z-pointer. The data in R1 and R0 are ignored. The PGERS bit will auto-clear uponcompletion of a page erase, or if no SPM instruction is executed within four clock cycles.The CPU is halted during the entire page write operation if the NRWW section isaddressed.• Bit 0 – SPMEN: Store Program Memory EnableThis bit enables the SPM instruction for the next four clock cycles. If written to onetogether with either RWWSRE, BLBSET, PGWRT’ or PGERS, the following SPMinstruction will have a special meaning, see description above.
If only SPMEN is written,the following SPM instruction will store the value in R1:R0 in the temporary page bufferaddressed by the Z-pointer. The LSB of the Z-pointer is ignored. The SPMEN bit willauto-clear upon completion of an SPM instruction, or if no SPM instruction is executedwithin four clock cycles. During page erase and page write, the SPMEN bit remains highuntil the operation is completed.Writing any other combination than “10001”, “01001”, “00101”, “00011” or “00001” in thelower five bits will have no effect.Addressing the FlashDuring SelfProgrammingThe Z-pointer is used to address the SPM commands.Bit15141312111098ZH (R31)Z15Z14Z13Z12Z11Z10Z9Z8ZL (R30)Z7Z6Z5Z4Z3Z2Z1Z076543210Since the Flash is organized in pages (see Table 89 on page 222), the Program Countercan be treated as having two different sections.
One section, consisting of the least significant bits, is addressing the words within a page, while the most significant bits areaddressing the pages. This is shown in Figure 103. Note that the page erase and pagewrite operations are addressed independently. Therefore it is of major importance thatthe Boot Loader software addresses the same page in both the page erase and pagewrite operation. Once a programming operation is initiated, the address is latched andthe Z-pointer can be used for other operations.The only SPM operation that does not use the Z-pointer is Setting the Boot Loader LockBits.
The content of the Z-pointer is ignored and will have no effect on the operation. TheLPM instruction does also use the Z-pointer to store the address. Since this instructionaddresses the Flash byte by byte, also the LSB (bit Z0) of the Z-pointer is used.2112486O–AVR–10/04Figure 103. Addressing the Flash during SPM(1)BIT15ZPCMSBZPAGEMSBZ - REGISTER1 00PCMSBPROGRAMCOUNTERPAGEMSBPCPAGEPAGE ADDRESSWITHIN THE FLASHPCWORDWORD ADDRESSWITHIN A PAGEPROGRAM MEMORYPAGEPAGEINSTRUCTION WORDPCWORD[PAGEMSB:0]:000102PAGEENDNotes:Self-Programming theFlash1. The different variables used in the figure are listed in Table 84 on page 218.2.
PCPAGE and PCWORD are listed in Table 89 on page 222.The Program memory is updated in a page by page fashion. Before programming apage with the data stored in the temporary page buffer, the page must be erased. Thetemporary page buffer is filled one word at a time using SPM and the buffer can be filledeither before the page erase command or between a page erase and a page writeoperation:Alternative 1, fill the buffer before a page erase.•Fill temporary page buffer.•Perform a page erase.•Perform a page write.Alternative 2, fill the buffer after page erase.•Perform a page erase.•Fill temporary page buffer.•Perform a page write.If only a part of the page needs to be changed, the rest of the page must be stored (forexample in the temporary page buffer) before the erase, and then be rewritten.
Whenusing alternative 1, the boot loader provides an effective Read-Modify-Write featurewhich allows the user software to first read the page, do the necessary changes, andthen write back the modified data. If alternative 2 is used, it is not possible to read theold data while loading since the page is already erased.
The temporary page buffer canbe accessed in a random sequence. It is essential that the page address used in boththe page erase and page write operation is addressing the same page. See “Simple212ATmega8(L)2486O–AVR–10/04ATmega8(L)Assembly Code Example for a Boot Loader” on page 216 for an assembly codeexample.Performing Page Erase bySPMFilling the Temporary Buffer(Page Loading)To execute page erase, set up the address in the Z-pointer, write “X0000011” toSPMCR and execute SPM within four clock cycles after writing SPMCR.
The data in R1and R0 is ignored. The page address must be written to PCPAGE in the Z-register.Other bits in the Z-pointer will be ignored during this operation.•Page Erase to the RWW section: The NRWW section can be read during the pageerase.•Page Erase to the NRWW section: The CPU is halted during the operation.To write an instruction word, set up the address in the Z-pointer and data in R1:R0, write“00000001” to SPMCR and execute SPM within four clock cycles after writing SPMCR.The content of PCWORD in the Z-register is used to address the data in the temporarypage buffer. The temporary buffer will auto-erase after a page write operation or by writing the RWWSRE bit in SPMCR.
It is also erased after a System Reset. Note that it isnot possible to write more than one time to each address without erasing the temporarybuffer.Note:Performing a Page WriteIf the EEPROM is written in the middle of an SPM page Load operation, all data loadedwill be lost.To execute page write, set up the address in the Z-pointer, write “X0000101” to SPMCRand execute SPM within four clock cycles after writing SPMCR. The data in R1 and R0is ignored.
The page address must be written to PCPAGE. Other bits in the Z-pointermust be written to zero during this operation.•Page Write to the RWW section: The NRWW section can be read during the pagewrite.•Page Write to the NRWW section: The CPU is halted during the operation.Using the SPM InterruptIf the SPM interrupt is enabled, the SPM interrupt will generate a constant interruptwhen the SPMEN bit in SPMCR is cleared.
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