Volume 1 Application Programming (794095), страница 71
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3.13—July 2007AMD64 Technologydetermines that an unmasked exception is pending—by checking the exception status (ES) flag in thex87 status word—and invokes the #MF exception service routine.#MF Exception Types and Flags. The #MF exceptions are of six types, five of which are mandatedby the IEEE 754 standard. These six types and their bit-flags in the x87 status word are shown inTable 6-17. A stack fault (SF) exception is always accompanied by an invalid-operation exception(IE). A summary of each exception type is given in “x87 Status Word Register (FSW)” on page 241.Table 6-17.
x87 Floating-Point (#MF) Exception FlagsException and Mnemonicx87 StatusWord Bit1Comparable IEEE 754ExceptionInvalid-operation exception (IE)0Invalid OperationInvalid-operation exception (IE)with stack fault (SF) exception0 and 6noneDenormalized-operand exception (DE)1noneZero-divide exception (ZE)2Division by ZeroOverflow exception (OE)3OverflowUnderflow exception (UE)4UnderflowPrecision exception (PE)5InexactNote:1. See “x87 Status Word Register (FSW)” on page 241 for a summary of each exception.The sections below describe the causes for the #MF exceptions. Masked and unmasked responses tothe exceptions are described in “x87 Floating-Point Exception Masking” on page 284.
The priority of#MF exceptions are described in “x87 Floating-Point Exception Priority” on page 283.Invalid-Operation Exception (IE). The IE exception occurs due to one of the attempted operationsshown in Table 6-18 on page 282. An IE exception may also be accompanied by a stack fault (SF)exception. See “Stack Fault (SF)” on page 283.x87 Floating-Point Programming281AMD64 Technology24592—Rev. 3.13—July 2007Table 6-18. Invalid-Operation Exception (IE) CausesOperationCondition• A source operand is an SNaN, orAny Arithmetic Operation • A source operand is an unsupported data type (pseudoNaN, pseudo-infinity, or unnormal).Arithmetic(IE exception)Stack(IE and SF exceptions)FADD, FADDPSource operands are infinities with opposite signs.FSUB, FSUBP, FSUBR,FSUBRPSource operands are infinities with same sign.FMUL, FMULPSource operands are zero and infinity.FDIV, FDIVP, FDIVR,FDIVRPSource operands are both infinities or both zeros.FSQRTSource operand is less than zero (except ±0 which returns±0).FYL2XSource operand is less than zero (except ±0 which returns±∞).FYL2XP1Source operand is less than minus one.FCOS, FPTAN, FSIN,FSINCOSSource operand is infinity.FCOM, FCOMP,FCOMPP, FCOMI,FCOMIPA source operand is a QNaN.FPREM, FPREM1Dividend is infinity or divisor is zero.FIST, FISTP, FISTTPSource operand overflows the destination size.FBSTPSource operand overflows packed BCD data size.Stack overflow or underflow.1Note:1.
The processor sets condition code C1 = 1 for overflow, C1 = 0 for underflow.Denormalized-Operand Exception (DE). The DE exception occurs in any of the following cases:••Denormalized Operand (any precision)—An arithmetic instruction uses an operand of anyprecision that is in denormalized form, as described in “Denormalized (Tiny) Numbers” onpage 255.Denormalized Single-Precision or Double-Precision Load—An instruction loads a singleprecision or double-precision (but not double-extended-precision) operand, which is indenormalized form, into an x87 register.Zero-Divide Exception (ZE). The ZE exception occurs when:••Divisor is Zero—An FDIV, FDIVP, FDIVR, FDIVRP, FIDIV, or FIDIVR instruction attempts todivide zero into a non-zero finite dividend.Source Operand is Zero—An FYL2X or FXTRACT instruction uses a source operand that is zero.282x87 Floating-Point Programming24592—Rev.
3.13—July 2007AMD64 TechnologyOverflow Exception (OE). The OE exception occurs when the value of a rounded floating-pointresult is larger than the largest representable normalized positive or negative floating-point number inthe destination format, as shown in Table 6-5 on page 253. An overflow can occur throughcomputation or through conversion of higher-precision numbers to lower-precision numbers.
See“Precision” on page 261. Integer and BCD overflow is reported via the invalid-operation exception.Underflow Exception (UE). The UE exception occurs when the value of a rounded, non-zerofloating-point result is too small to be represented as a normalized positive or negative floating-pointnumber in the destination format, as shown in Table 6-5 on page 253. Integer and BCD underflow isreported via the invalid-operation exception.Precision Exception (PE). The PE exception, also called the inexact-result exception, occurs when afloating-point result, after rounding, differs from the infinitely precise result and thus cannot berepresented exactly in the specified destination format. Software that does not require exact resultsnormally masks this exception.
See “Precision” on page 261 and “Rounding” on page 261.Stack Fault (SF). The SF exception occurs when a stack overflow (due to a push or load into a non-empty stack register) or stack underflow (due to referencing an empty stack register) occurs in the x87stack-register file. The empty and non-empty conditions are shown in Table 6-3 on page 247. Wheneither of these conditions occur, the processor also sets the invalid-operation exception (IE) flag, and itsets or clears the condition-code 1 (C1) bit to indicate the direction of the stack fault (C1 = 1 foroverflow, C1 = 0 for underflow). Unlike the flags for the other x87 exceptions, the SF flag does nothave a corresponding mask bit in the x87 control word.6.8.3 x87 Floating-Point Exception PriorityTable 6-19 shows the priority with which the processor recognizes multiple, simultaneous SIMDfloating-point exceptions and operations involving QNaN operands.
Each exception type ischaracterized by its timing, as follows:••Pre-Computation—an exception that is recognized before an instruction begins its operation.Post-Computation—an exception that is recognized after an instruction completes its operation.For post-computation exceptions, a result may be written to the destination, depending on the type ofexception and whether the destination is a register or memory location.
Operations involving QNaNsdo not necessarily cause exceptions, but the processor handles them with the priority shown inTable 6-19 on page 284 relative to the handling of exceptions.x87 Floating-Point Programming283AMD64 Technology24592—Rev. 3.13—July 2007Table 6-19.PriorityPriority of x87 Floating-Point ExceptionsException or OperationTiming1Invalid-operation exception (IE) with stack fault(SF) due to underflowPre-Computation2Invalid-operation exception (IE) with stack fault(SF) due to overflowPre-Computation3Invalid-operation exception (IE) when accessingunsupported data typePre-Computation4Invalid-operation exception (IE) when accessingSNaN operandPre-Computation5Operation involving a QNaN operand16789—Any other type of invalid-operation exception (IE)Pre-ComputationZero-divide exception (ZE)Pre-ComputationDenormalized operation exception (DE)Pre-ComputationOverflow exception (OE)Post-ComputationUnderflow exception (UE)Post-ComputationPrecision (inexact) exception (PE)Post-ComputationNote:1.
Operations involving QNaN operands do not, in themselves, cause exceptions but they arehandled with this priority relative to the handling of exceptions.For exceptions that occur before the associated operation (pre-operation, as shown in Table 6-19), if anunmasked exception occurs, the processor suspends processing of the faulting instruction but it waitsuntil the boundary of the next non-control x87 or 64-bit media instruction to be executed beforeinvoking the associated exception service routine.
During this delay, non-x87 instructions mayoverwrite the faulting x87 instruction’s source or destination operands in memory. If that occurs, thex87 service routine may be unable to perform its job.To prevent such problems, analyze x87 procedures for potential exception-causing situations andinsert a WAIT or other safe x87 instruction immediately after any x87 instruction that may cause aproblem.6.8.4 x87 Floating-Point Exception MaskingThe six floating-point exception flags in the x87 status word have corresponding exception-flag masksin the x87 control word, as shown in Table 6-20 on page 285.284x87 Floating-Point Programming24592—Rev.
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