Сигнальный МП Motorola DSP56002 (1086189), страница 56
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DI is set by hardware and software resets.7.4.9Data Output (DO) Bit 10When the TIO pin acts as a general purpose I/O output pin (TC2-TC0 are all zero andDIR=1), writing to the DO bit writes the data to the TIO pin. However, if the INV bit is set,the data written to the TIO pin will be inverted. When GPIO mode is disabled, writing tothe DO bit will have no effect. DO is cleared by hardware and software resets.7.4.10 TCSR Reserved bits (Bits 11-23)These reserved bits are read as zero and should be written with zero for future compatibility.7.5TIMER/EVENT COUNTER MODES OF OPERATIONThis section gives the details of each of the timer modes of operation.
Table 7-1 on page7-6 summarizes the items which determine the timer mode, including the configuration ofthe timer control bits, the function of the TIO pin, and the clock source.7.5.1Timer Mode 0 (Standard Timer Mode, Internal Clock, No Timer Output)Timer Mode 0 is defined by TCSR bits TC2-TC0 equal to 000.With the timer enabled (TE=1), the counter is loaded with the value contained by the TCR. Thecounter is decremented by a clock derived from the internal DSP clock, divided by two (CLK/2).During the clock cycle following the point where the counter reaches 0, the TS bit is set and thetimer generates an interrupt.
The counter is reloaded with the value contained by the TCR, andthe entire process is repeated until the timer is disabled (TE=0). Figure 7-3 illustrates Mode 0MOTOROLADSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.com7-7Freescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATIONwith the timer enabled. Figure 7-4 illustrates the events with the timer disabled.Note: It is recommended that the GPIO input function of Mode 0 only be activated withthe timer disabled.
If the processor attempts to read the DI bit to determine theGPIO pin direction, it must read the entire TCSR register, which would clear the TSbit and, thus, clear a pending timer interrupt.Freescale Semiconductor, Inc...7.5.2Timer Mode 1 (Standard Timer Mode, Internal Clock, Output Pulse Enabled)Timer Mode 1 is defined by TC2-TC0 equal to 001.With the timer enabled (TE=1), the counter is loaded with the value contained by the TCR. Thecounter is decremented by a clock derived from the DSP’s internal clock, divided by two (CLK/2).During the clock cycle following the point where the counter reaches 0, the TS bit is set andthe timer generates an interrupt.
A pulse with a two clock cycle width and whose polarity isdetermined by the INV bit, will be put out on the TIO pin. The counter is reloaded with theFirst EventWrite Preload (N)Last EventTEClock (CLK/2)TCRCounterNNN-10NTSInterruptFigure 7-3 Standard Timer Mode (Mode 0)7-8DSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATIONStop CountingPreload (N)First EventFreescale Semiconductor, Inc...TEClock (CLK/2)TCRNCounterN-kN-k-1N-k-1NN-1TSInterruptFigure 7-4 Timer/Event Counter Disablevalue contained by the TCR.
The entire process is repeated until the timer is disabled(TE=0). Figure 7-5 illustrates Timer Mode 1 when INV=0, and Figure 7-6 illustrates TimerMode 1 when INV=1.7.5.3 Timer Mode 2 (Standard Timer Mode, Internal Clock, Output Toggle Enabled)Timer Mode 2 is defined by TC2-TC0 equal to 010.With the timer enabled (TE=1), the counter is loaded with the value contained by the TCR.
Thecounter is decremented by a clock derived from the DSP’s internal clock, divided by two (CLK/2).MOTOROLADSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.com7-9Freescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATIONDuring the clock cycle following the point where the counter reaches 0, the TS bit in TCSR is setand, if the TIE is set, an interrupt is generated.The counter is reloaded with the value containedby the TCR and the entire process is repeated until the timer is disabled (TE=0). Each time thecounter reaches 0, the TIO output pin will be toggled.
The INV bit determines the polarity of theTIO output. Figure 7-7 illustrates Timer Mode 2.Freescale Semiconductor, Inc...7.5.4Timer Mode 4 (Pulse Width Measurement Mode)Timer Mode 4 is defined by TC2-TC0 equal 100.In this mode, TIO acts as a gating signal for the DSP’s internal clock.
With the timer enabled (TE=1), the counter is driven by a clock derived from the DSP’s internal clock dividedWrite Preload (N) First EventLast EventNew EventTEClock (CLK/2)TCRNCounterNN-10NN-1Interrupt2xCLKTIOFigure 7-5 Standard Timer Mode, Internal Clock, Output Pulse Enabled (INV=0)7 - 10DSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATIONby two (CLK/2). The counter is loaded with 0 by the first transition occurring on the TIOinput pin and starts incrementing. When the first edge of opposite polarity occurs on TIO,the counter stops, the TS bit in TCSR is set and, if TIE is set, an interrupt is generated.The contents of the counter is loaded into the TCR.
The user’s program can read the TCR,which now represents the widths of the TIO pulse. The process is repeated until the timeris disabled (TE=0).The INV bit determines whether the counting is enabled when TIO ishigh (INV=0) or when TIO is low (INV=1). Figure 7-8 illustrates Timer Mode 4 when INV=0and Figure 7-9 illustrates Timer Mode 4 with INV=1.Freescale Semiconductor, Inc...Write Preload (N) First EventLast EventNew EventTEClock (CLK/2)TCRNCounterNN-10NN-1Interrupt2xCLKTIOFigure 7-6 Standard Timer Mode, Internal Clock, Output Pulse Enabled (INV=1)MOTOROLADSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.com7 - 11Freescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATIONFreescale Semiconductor, Inc...7.5.5Timer Mode 5 (Period Measurement Mode)Timer Mode 5 is defined by TC2-TC0 equal 101.In Timer Mode 5, the counter is driven by a clock derived from the DSP’s internal clockdivided by 2 (CLK/2).
With the timer enabled (TE=1), the counter is loaded with the valuecontained by the TCR and starts incrementing. On each transition of the same polaritythat occurs on TIO, the TS bit in TCSR is set and, if TIE is set, an interrupt is generated.The contents of the counter is loaded in the TCR. The user’s program can read the TCRand subtract consecutive values of the counter to determine the distance between TIOedges.
The counter is not stopped and it continues to increment. The INV bit determineswhether the period is measured between 0-to-1 transitions of TIO (INV=0), or between1-to-0 transitions of TIO (INV=1). Figure 7-10 illustrates Timer Mode 5 when INV=0, andFigure 7-11 illustrates this mode with INV=1.Last EventFirst EventLast EventNew EventTEClock (CLK/2)TCR NCounter0NN-10NN-1InterruptTIOFigure 7-7 Standard Timer Mode, Internal Clock, Output Toggle Enable7 - 12DSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATIONFreescale Semiconductor, Inc...7.5.6Timer Mode 6 (Standard Time Counter Mode, External Clock)Time Mode 6 is defined by TC2-TC0 equal 110.With the timer enabled (TE=1) the counter is loaded with the 1’s complement of the valuecontained by the TCR.
The counter is incremented by the transitions on the incoming signal on the TIO input pin. After each increment, the counter value is loaded into the TCR.Thus, reading the TCR will give the value of the counter at any given moment. At the transition following the point where the counter reaches 0, the TS bit in TCSR is set and, ifthe TIE is set, an interrupt is generated.The counter will wrap around and the process isrepeated until the timer is disabled (TE=0).
The INV bit determines whether 0-to-1 transitions (INV=0) or 1-to-0 transitions (INV=1) will increment the counter. Figure 7-12illustrates Timer Mode 6 when INV=0. Figure 7-13 illustrates Timer Mode 7 when INV=1.Stop EventStart EventStart EventTEClockNTCRCounter01N-1N0InterruptTIOFigure 7-8 Pulse Width Measurement Mode (INV=0)MOTOROLADSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.com7 - 13Freescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATION7.5.7Timer Mode 7 (Standard Timer Mode, External Clock)Timer Mode 7 is defined by TC2-TC0 equal 111.Freescale Semiconductor, Inc...With the timer enabled (TE=1), the counter is loaded with the value contained by the TCR.The counter is decremented by the transitions of the signal coming in on the TIO input pin.At the transition that occurs after the counter has reached 0, the TS bit in TCSR is set and,if the TIE is set, the timer generates an interrupt.
The counter is reloaded with the valueStop EventStart EventStart EventTEClockTCR xxxCounterNyyy01N-1N0InterruptTIOFigure 7-9 Pulse Width Measurement Mode (INV=1)7 - 14DSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.TIMER/EVENT COUNTER BEHAVIOR DURING WAIT and STOPcontained by the TCR, and the entire process is repeated until the timer is disabled(TE=0).
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