Сигнальный МП Motorola DSP56002 (1086189), страница 55
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-37.2TIMER/EVENT COUNTER BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . 7-37.3TIMER COUNT REGISTER (TCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-47.4TIMER CONTROL/STATUS REGISTER (TCSR) . . . . .
. . . . . . . . . . . . . . . 7-57.5TIMER/EVENT COUNTER MODES OF OPERATION . . . . . . . . . . . . . . . . 7-77.6TIMER/EVENT COUNTER BEHAVIOR DURING WAIT and STOP . . . . . . 7-167.7OPERATING CONSIDERATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7-177.8SOFTWARE EXAMPLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-187-2DSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.INTRODUCTION7.1INTRODUCTIONThis section describes the timer/event counter module*.
The timer can use internal or external clocking and can interrupt the processor after a number of events (clocks) specifiedby a user program, or it can signal an external device after counting internal events.Freescale Semiconductor, Inc...The timer connects to the external world through the bidirectional TIO pin. When TIO isused as input, the module is functioning as an external event counter or is measuring external pulse width/signal period. When TIO is used as output, the module is functioning asa timer and TIO becomes the timer pulse. When the TIO pin is not used by the timer module it can be used as a general purpose I/O (GPIO) pin.Note: When the timer is disabled, the TIO pin becomes three-stated. To prevent undesired spikes from occurring, the TIO pin should be pulled up or down when it is notin use.7.2TIMER/EVENT COUNTER BLOCK DIAGRAMFigure 7-1 shows a block diagram of the timer module. It includes a 24-bit read-write Timer Control and Status Register (TCSR), a 24-bit read-write Timer Count Register (TCR),a 24-bit counter, and logic for clock selection and interrupt generation.GDB24242424-bit Timer Control/Status Register (TCSR)24-bit Timer CountRegister (TCR)24324-bit CounterClock selectCLK/2TIOTimer interruptFigure 7-1 Timer/Event Counter Module Block Diagram* The first version of the DSP56002 (mask number D41G) did not have the timer/event counter.
Later versions of the DSP56002 which havedifferent mask numbers do have the timer/event counter. This mask number can be found below the part number on each chip.MOTOROLADSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.com7-3Freescale Semiconductor, Inc.TIMER COUNT REGISTER (TCR)TIMER ENABLETIMER INTERRUPT ENABLEINVERTERTIMER CONTROL BITSTIMER CONTROL/STATUS REGISTER (TCSR)ADDRESS X:$FFDEREAD/WRITE023******** *****DO DI DIR TS GPIO TC2 TC1 TC0 INV TIE TE(0) (1) (0) (0) (0) (0) (0) (0) (0) (0) (0)Freescale Semiconductor, Inc...GENERAL PURPOSE I0TIMER STATUSDIRECTION BITDATA INPUTDATA OUTPUTRESERVEDTIMER COUNT REGISTER (TCR)ADDRESS X:$FFDFREAD/WRITE230* - reserved, read as zero, should be written with zero for future compatibilityFigure 7-2 Timer/Event Counter Programming ModelThe DSP56002 views the timer as a memory-mapped peripheral occupying two 24-bitwords in the X data memory space, and may use it as a normal memory-mapped peripheral by using standard polled or interrupt programming techniques.The programmingmodel is shown in Figure 7-2.7.3TIMER COUNT REGISTER (TCR)The 24-bit read-write TCR contains the value (specified by the user program) to be loadedinto the counter when the timer is enabled (TE=1), or when the counter has been decremented to zero and a new event occurs.
If the TCR is loaded with n, the counter will bereloaded after (n+1) events.If the timer is disabled (TE=0) and the user program writes to the TCR, the value is storedthere but will not be loaded into the counter until the timer becomes enabled. When thetimer is enabled (TE=1) and the user program writes to the TCR, the value is stored thereand will be loaded into the counter after the counter has been decremented to zero and anew event occurs.In Timer Modes 4 and 5, however, the TCR will be loaded with the current value of thecounter on the appropriate edge of the TIO input signal (rather than with a value specifiedby the user program). The value loaded to the TCR represents the width or the period of7-4DSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.TIMER CONTROL/STATUS REGISTER (TCSR)the signal coming in on the TIO pin, depending on the timer mode.
See Sections 7.5.4and 7.5.5 for detailed descriptions of Timer Modes 4 and 5.Freescale Semiconductor, Inc...7.4TIMER CONTROL/STATUS REGISTER (TCSR)The 24-bit read/write TCSR controls the timer and verifies its status. The TCSR can beaccessed by normal move instructions and by bit manipulation instructions. The controland status bits are described in the following paragraphs.7.4.1Timer Enable (TE) Bit 0The TE bit enables or disables the timer. Setting the TE bit (TE=1) will enable the timer,and the counter will be loaded with the value contained in the TCR and will start decrementing at each incoming event. Clearing the TE bit will disable the timer. HardwareRESET and software RESET (RESET instruction) clear TE.7.4.2Timer Interrupt Enable (TIE) Bit 1The TIE bit enables the timer interrupts after the counter reaches zero and a new eventoccurs.
If TCR is loaded with n, an interrupt will occur after (n+1) events.Setting TIE (TIE=1) will enable the interrupts.When the bit is cleared (TIE=0) the interruptsare disabled. Hardware and software resets clear TIE.7.4.3Inverter (INV) Bit 2The INV bit affects the polarity of the external signal coming in on the TIO input and thepolarity of the output pulse generated on the TIO output.If TIO is programmed as an input and INV=0, the 0-to-1 transitions on the TIO input pinwill decrement the counter.
If INV=1, the 1-to-0 transitions on the TIO input pin will decrement the counter.If TIO is programmed as output and INV=1, the pulse generated by the timer will be inverted before it goes to the TIO output pin. If INV=0, the pulse is unaffected.In Timer Mode 4 (see Section 7.5.4 Timer Mode 4 (Pulse Width Measurement Mode)),the INV bit determines whether the high pulse or the low pulse is measured to determineinput pulse width. In Timer Mode 5 (see Section 7.5.5 Timer Mode 5 (Period Measurement Mode)), the INV bit determines whether the period is measured between leading ortrailing edges.In GPIO mode, the INV bit determines whether the data read from or written to the TIOpin shall be inverted (INV=1) or not (INV=0).INV is cleared by hardware and software resets.Note: Because of its affect on signal polarity, and on how GPIO data is read and written,MOTOROLADSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.com7-5Freescale Semiconductor, Inc.TIMER CONTROL/STATUS REGISTER (TCSR)the status of the INV bit is crucial to the timer’s function.
Change it only when thetimer is disabled (TE=0).7.4.4Timer Control (TC0-TC2) Bits 3-5The three TC bits control the source of the timer clock, the behavior of the TIO pin, andthe timer mode of operation. Table 7-1 summarizes the functionality of the TC bits.A detailed description of the timer operating modes is given in Chapter 3.Freescale Semiconductor, Inc...The timer control bits are cleared by hardware RESET and software RESET (RESET instruction).Note 1: If the clock is external, the counter will be decremented by the transitions on theTIO pin. The DSP synchronizes the external clock to its own internal clock.
Theexternal clock’s frequency should be lower than the maximum internal frequencydivided by 4 (CLK/4).Note 2: The TC2-TC0 bits should be changed only when TE=0 (timer disabled) to ensureproper functionality.Table 7-1 Timer/Event Counter Control BitsTC2TC1TC0TIOCLOCKMODE000GPIO*InternalTimer (Mode 0)001OutputInternalTimer Pulse (Mode 1)010OutputInternalTimer Toggle (Mode 2)011——Reserved - Do Not Use100InputInternalInput Width (Mode 4)101InputInternalInput Period (Mode 5)110InputExternalStandard Time Counter (Mode 6)111InputExternalEvent Counter (Mode 7)* - the GPIO function is enabled only if TC2-TC0 are all 0 (zero) and the GPIO bit is set.7.4.5General Purpose I/O (GPIO) Bit 6If the GPIO bit is set (GPIO=1) and if TC2-TC0 are all zeros, the TIO pin operates as ageneral purpose I/O pin, whose direction is determined by the DIR bit.
If GPIO=0 the general purpose I/O function is disabled. GPIO is cleared by hardware and software resets.Note: The case where TC2-TC0 are not all zero and GPIO=1 is undefined and should notbe used7.4.6Timer Status (TS) Bit 7When the TS bit is set, it indicates that the counter has been decremented to zero.7-6DSP56002 TIMER AND EVENT COUNTERFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.TIMER/EVENT COUNTER MODES OF OPERATIONThe TS bit is cleared when the TCSR is read. The bit is also cleared when the timer interruptis serviced (timer interrupt acknowledge).
TS is cleared by hardware and software resets.Freescale Semiconductor, Inc...7.4.7Direction (DIR) Bit 8The DIR bit determines the behavior of the TIO pin when TIO acts as general purpose I/O.When DIR=0, the TIO pin acts as an input. When DIR=1, the TIO pin acts as an output.DIR is cleared by hardware and software resets.Note: The TIO pin can act as a general purpose I/O pin only when TC2-TC0 are all zeroand the GPIO bit is set. If one of TC2, TC1 or TC0 is not 0, the GPIO function isdisabled and the DIR bit has no effect.7.4.8Data Input (DI) Bit 9When the TIO pin acts as a general purpose I/O input pin (TC2-TC0 are all zero andDIR=0), the contents of the DI bit will reflect the value the TIO pin. However, if the INV bitis set, the data in DI will be inverted. When GPIO mode is disabled or it is enabled in output mode (DIR=1), the DI bit reflects the value of the TIO pin, again depending on thestatus of the INV bit.
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