VIP_Conformal_Photoresist_Coatings_for_H igh_Aspect_Ratio_Features_09 (1063537), страница 2
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Many different materials have beensuccessfully spray coated, and materials are typically diluteddown to a viscosity of only a few centipoises.x1x2pw : Pitch widthh 1/2The binary nozzle is mounted to an arm, which in turn ismounted to an XY translation stage. This stage transportsthe nozzle at a programmed slew rate to all portions of thewafer. This slew rate and the stepping pitch have beendetermined by knowing the viscosity of the material to bedeposited, the size and shape of the structure, and thedesired coating thickness. Round wafers are coated with atruncated pattern to maximize coating efficiency andthroughput.The substrate is fixed by vacuum to an appropriately-sizedchuck; a variety of chuck sizes is available, and chucks canbe exchanged rapidly.
Temperature of the substrate chuckis programmable, with the temperature chosen based onprocess requirements. By selecting appropriate resist flowrates, N2 dispense pressure and chuck temperature, theresist droplets impinge onto the water surface and dry veryquickly, allowing the resist to flow only a desired amount orPath of the Spray nozzlepw = d(x1,x2)pwFigure 5: Deposition Pattern for Multiple Passesusing the slew rate and stepping pitch determined above,depicted in Figure 5. After the substrate has been coated inthis first pass, the wafer is rotated to a programmed angle,and the process is repeated until the desired coating resultsare achieved.Density distribution ofthe resist dropletsFigure 6: Resist Uniformity on Planar WaferFigure 4: Deposition Pattern for Single PassRESULTS AND DISCUSSIONTo baseline the coating performance, a series of tests wascarried out on 150mm planar silicon wafers.
As notedearlier in this paper, planar wafers are not the intendedsubstrate for spray coating, since the simpler and incumbentspin coating method can normally achieve good results onthese substrates. As seen in Figure 6, the resist thicknesswas about 6.2µ, with a standard deviation of about 2.1%.Though this uniformity is not ideal and is not as tight as anormal spin coating process on a planar wafer, itdemonstrates the ability of the spray coater to deliverconsistent results on all portions of the wafer and expandsthe realm of photolithographic printing into technologieswith high topography.To characterize the coating repeatability, a batch of 25wafers was coated with a similar process, but with about3.5µ as the target thickness.
Coating uniformity within thebatch and from batch to batch was very good, as seen inFigures 7 and 8.4,54,3Resist Thickness[µm]4,13,9+ 5%3,5- 5%3,3The first structure to be coated was a test structure withgroove-like structures. This structure was selected becauseit is representative of the high topography commonlyencountered in wafer level packaging, micromechanicalsystems (MEMS) and optoelectronic applications. Thesestructures were created by preferentially etching the Sisurface with a liquid etchant, creating the approximate 54degree sidewall angle.
The structured wafer was held by thevacuum chuck as the pre-diluted photoresist AZ4999 fromAZ Electronic Materials was sprayed onto the surface withmultiple passes until the desired thickness of about 4.5µ wasachieved, as shown in Figure 9. As can be seen in thehigher magnification insets in the photo, good coverage wasachieved despite the cusping or lip at the top of thestructure. Note also the lack of pooling of the resist at thebottom of the structure.Similarly, a dielectric material (Cyclotene 4000 series fromDow Chemical) was diluted and spray-coated onto a vgroove structure, shown in Figure 10. Insets in the photoindicatemeasuredthicknesses of 7µ on thetop (unetched) surface,4-5µm on topabout 5um at the topResist thickness uniformity over 25 wafers3,7silicon-vias (TSV’S).3,12,9Source: CIS2,725.23.21.19.17.15.13.9.11.7.5.3.1.2,5Wafer SlotFigure 7: Resist Uniformity Wafer-to-Wafer>200µmResist thickness uniformity over 25 wafers and different days4,524.08.2006Resist Thickness[µm]4,3Figure 9: Conformal Coverage on an etched MultifacetedStructure with AZ4999 resist25.08.2006 I4,125.08.2006 II3,928.08.20063,73,53,37µm top3,12,92,725.23.21.19.17.15.13.11.9.7.5.3.1.2,5Wafer Slot300µm stepFigure 8: Resist Uniformity Batch-to-BatchAs emphasized in the introduction to this paper, hightopography is the intended application space for spraycoating, so a number of test wafers and customer sampleswere coated to explore results on challenging structures,including v-grooves, etched trenches, micro-lenses, verticaltrenches, and actual device structures such as through-5µm on topof the edgeFigure 10: Modified BCB4024 coated on v-groovecorner, where surface tension would normally tear thematerial away, and about 3µ at the bottom of the trench,where gravity would normally pull a liquid material into apooled state.4µmAfter these tests with relatively shallow angles, a test devicewith 90 degree sidewalls was prepared using a 150mm Siwafer.
These vertical grooves were processed into thewafer, nearly extending the full thickness of the wafer. Theuncoated trenches covered the entire surface of the wafer, asdepicted in Figure 12. Subsequent processing required thatthe sidewalls of these trenches be completely coated withphotoresist, but without pooling at the bottom. This wasconsidered to be an extreme challenge for photoresistcoating.Using the spray coat tool described, a process was devisedusing the off-the-shelf AZ4999 resist. Several spray passeswere used to coat to the required thickness, and thesidewalls were adequately covered from top to bottom tomeet process requirements, as shown in Figure 13.Figure 11: Shipley 1818 Resist conformally coated ontomicrolens structure. Photo courtesy SUSS MicroOpticsFigure 13: Seagate Vertical Trenches conformally coatedwith AZ4999 resistFigure 12: Vertical Structures from Seagate Researchbefore Resist CoatingThe next structure to be coated consisted of glass substratewhich had been selectively etched to form cylindricallenses.
Such structures are used in imaging applications toform microlenses which are applied to manipulate ortranslate an image or a distribution of light. This structurewas spray-coated with a diluted form of Shipley 1818photoresist from Rohm and Haas chemicals, with the resultsshown in Figure 11.Finally, the spray coating technology was applied to adevice wafer for an advanced imaging sensor from SchottAdvanced Packaging. This device is highlighted becausethe shape, materials and Through Silicon Via (TSV)structure utilized is typical of many emerging applicationsin the realm of wafer level packaging and 3-DimensionalIntegration. In this specific case, a tapered via allowed boththe Inter-Dielectric Layer (IDL) and the photoresist to bespray coated onto the TSV structure4. Tapered vias willlikely be used on many devices where the available realestate allows their use due to the cost savings of spraycoating over chemical vapor deposition (CVD).
The resultsare depicted in Figure 14 and show excellent coverage on allareas of the TSV, especially at the critical corners.Figure 14: Through Silicon Via conformally coatedwith dielectric and photoresist. Photo courtesy of SchottAdvanced PackagingCONCLUSIONSThe problem of coating photoresist onto high aspect ratiofeatures has been investigated. Conventional spin coating,the incumbent technology for relatively planar substrates,cannot produce coatings of sufficient quality for goodlithographic results. A closed cover spin coating systemproduces sufficient results on topography up to about 10µbut not significantly higher.Spray coating has been proposed as an alternative solutionto producing conformal coatings over high topographicalsteps. The method was used with good results on numeroustest and device wafers with structures including v-grooves,vertical trenches and through silicon vias.
Spray coating istherefore shown to be an enabling technology for thesetypes of structures used in advanced packaging, 3dimensional integration and MEMS applications.REFERENCES1. Curtis, A., Bisson, P., Hamel, C., Hughlett, E..,Minimum Consumption Wafer Coating, Proc. 8thInt. Symposium of Adv. Packaging Materials,2002, pp. 302-310.2.
Fischer, K., and Suss, R., “Spray Coating – aSolution for Resist Film Deposition across SevereTopography”, Proc. Semicon West, July 2004.3. Jalonen, P. and Tuominen, A., “The applicabilityof electrodeposited photoresist in producing ultrafine lines using sputtered seeding layers,“Electronics Materials and Packaging, 2000, pp.152-155.4. Shariff, D., Suthiwongsunthorn, N., Bieck, F.,Leib, J., “Via Interconnections for Wafer LevelPackaging: Impact of Tapered Via Shape and ViaGeometry on Product Yield and Reliability,” 57thElectronic Components and Technology Conf,Reno, 2007, pp. 858-863..
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