CPM2A_PROGRAMMING MANUAL (W353-E1-2) (986750), страница 84
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. . . . . . . . . . . . .SRM1(-V2) Cycle Time and I/O Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-3-1 The SRM1(-V2) Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . .8-3-2 SRM1(-V2) Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-3-3 I/O Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-3-4 One-to-one PC Link I/O Response Time . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . .8-3-5 Interrupt Processing Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-3-6 SRM1(-V2) Instruction Execution Times . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . .484484485486487489490495495496497499500509509510512513514515483SectionCPM1/CPM1A Cycle Time and I/O Response Time8-18-1CPM1/CPM1A Cycle Time and I/O Response Time8-1-1 The CPM1/CPM1A CycleThe overall flow of CPM1/CPM1A operation is as shown in the following flowchart.Power applicationInitialization processesInitializationCheck hardware andProgram Memory.NoCheck OK?OverseeingprocessesYesSet error flags andactivate indicators.ERROR or ALARM?ERROR(lit)Preset cycle timemonitoring time.ALARM(flashing)Execute user program.End of program?NoProgramexecutionYesCheck cycle time setting.Minimumcycle time set?YesWait until minimum cycletime expires.CycletimeNoCycle timeprocessingCompute cycle time.Refresh input bits andoutput terminals.Service peripheral port.I/O refreshingServiceperipheralport.Note Initialization processes include clearing the IR, SR, and AR areas, presettingsystem timers, and checking I/O Units.484SectionCPM1/CPM1A Cycle Time and I/O Response Time8-18-1-2 CPM1/CPM1A Cycle TimeThe processes involved in a single CPM1/CPM1A cycle are shown in the following table, and their respective processing times are explained.ProcessContentTime requirementsOverseeingSetting cycle watchdog timer, I/O bus check, UMcheck, clock refreshing, refreshing bits allocated tonew functions, etc.0.6 msProgram executionUser program is executed.Total time for executing instructions.(Varies according to content of user’sprogram.)Cycle time calculationStandby until set time, when minimum cycle time isset in DM 6619 of PC Setup.Almost instantaneous, except forstandby processing.I/O refreshCalculation of cycle time.Input information is read to input bits.Output information (results of executing program) iswritten to output bits.Peripheral port servicingDevices connected to peripheral port serviced.10-point CPU :0.06 ms20-point CPU:0.06 ms30-point CPU:0.3 msExpansion I/O Unit: 0.3 ms0.26 ms min., 5% or less of cycletime up to 66 ms (see note)Note The percentage of the cycle allocated to peripheral port servicing can bechanged in the PC Setup (DM 6617).Cycle Time and OperationsCycle time10 ms or longer20 ms or longer100 ms or longer120 ms or longer200 ms or longerThe effects of the cycle time on CPM1/CPM1A operations are as shown below.When a long cycle time is affecting operation, either reduce the cycle time or improve responsiveness with interrupt programs.Operation conditionsTIMH(15) may be inaccurate when TC 004 through TC 127 are used (operation will be normal forTC 000 through TC 003).Programming using the 0.02-second Clock Bit (SR 25401) may be inaccurate.TIM may be inaccurate.
Programming using the 0.1-second Clock Bit (SR 25500) may be inaccurate. A CYCLE TIME OVER error is generated (SR 25309 will turn ON). See note 1.The FALS 9F monitoring time SV is exceeded. A system error (FALS 9F) is generated, and operation stops. See note 2.Programming using the 0.2-second Clock Bit (SR 25501) may be inaccurate.Note1. The PC Setup (DM 6655) can be used to disable detection of CYCLE TIMEOVER error.2.
The cycle monitoring time can be changed in the PC Setup (DM 6618).Cycle Time ExampleIn this example, the cycle time is calculated for a CPM1/CPM1A CPU Unit with20 I/O points (12 input points and 8 output points). The I/O is configured as follows:Inputs: 1 word (00000 to 00011)Outputs: 1 word (01000 to 01007)The rest of the operating conditions are assumed to be as follows:User’s program:500 instructions (consists of only LD and OUT)Cycle time:Variable (no minimum set)485SectionCPM1/CPM1A Cycle Time and I/O Response Time8-1The average processing time for a single instruction in the user’s program is assumed to be 2.86 µs. The cycle times are as shown in the following table.ProcessCalculation method1.
OverseeingFixedTime with Programming De- Time without ProgrammingviceDevice0.6 ms0.6 ms2. Program execution2.86 × 500 (µs)1.43 ms1.43 ms3. Cycle time calculationNegligible0 ms0 ms4. I/O refresh0.01 × 1 + 0.005 × 1 (µs)0.06 ms0.06 ms5. Peripheral port servicingMinimum time0.26 ms0 msCycle time(1) + (2) + (3) + (4) + (5)2.35 ms2.09 msNote1. The cycle time can be read from the PC via a Programming Device.2. The maximum and current cycle time are stored in AR 14 and AR 15.3.
The cycle time can vary with actual operating conditions and will not necessarily agree precisely with the calculated value.8-1-3 I/O Response TimeThe I/O response time is the time it takes after an input signal has been received(i.e., after an input bit has turned ON) for the PC to check and process the information and to output a control signal (i.e., to output the result of the processing to an output bit). The I/O response time varies according to the timing andprocessing conditions.The minimum and maximum I/O response times are shown here, using the following program as an example.OutputInputThe following conditions are taken as examples for calculating the I/O responsetimes.Input ON delay:Overseeing time:Instruction execution time:Output ON delay:Peripheral port:8 ms (input time constant: default setting)1 ms (includes I/O refresh for CPM1A)14 ms10 msNot used.Minimum I/O Response Time The CPM1/CPM1A responds most quickly when it receives an input signal justprior to I/O refreshing, as shown in the illustration below.InputpointInput ON delay (8 ms)InputbitI/O refreshingProgram execution and other processes(15 ms)I/O refreshingOutput ON delay (10 ms)OutputpointMin.
I/O response time = 8+15+10 = 33 ms486SectionCPM1/CPM1A Cycle Time and I/O Response Time8-1Maximum I/O Response Time The CPM1/CPM1A takes longest to respond when it receives the input signaljust after the input refresh phase of the cycle, as shown in the illustration below.In that case, a delay of approximately one cycle will occur.InputpointInput ON delay (8 ms)InputbitI/O refreshingProgram executionand other processes(15 ms)I/O refreshingProgram executionand other processes(15 ms)I/O refreshingOutput ON delay (10 ms)OutputpointMax. I/O response time = 8+15 × 2+10 = 48 ms8-1-4 One-to-one PC Link I/O Response TimeWhen two CPM1/CPM1As are linked 1:1, the I/O response time is the time required for an input executed at one of the CPM1/CPM1As to be output to theother CPM1/CPM1A by means of 1:1 PC Link communications.The minimum and maximum I/O response times are shown here, using as anexample the following instructions executed at the master and the slave.
In thisexample, communications proceed from the master to the slave.MasterSlaveOutput (LR)InputInput(LR)OutputThe following conditions are taken as examples for calculating the I/O responsetimes. In CPM1/CPM1A PCs, LR area words LR 00 to LR 15 are used in 1:1 datalinks and the transmission time is fixed at 12 ms.Input ON delay:Master cycle time:Slave cycle time:Output ON delay:Peripheral port:8 ms (input time constant: default setting)10 ms15 ms10 msNot used.Minimum I/O Response Time The CPM1/CPM1A responds most quickly under the following circumstances:1, 2, 3...1. The CPM1/CPM1A receives an input signal just prior to the input refreshphase of the cycle.2.
The Master’s communications servicing occurs just as the Master-to-Slavetransmission begins.487SectionCPM1/CPM1A Cycle Time and I/O Response Time8-13. The Slave’s communications servicing occurs just after the transmission iscompleted.InputpointI/O refreshOverseeing, communications, etc.Input ON delay (8 ms)InputbitMasterProgramexecutionCPUprocessingMaster’s cycle time (10 ms)Master toSlaveTransmission time (12 ms)ProgramexecutionCPUprocessingOutput ONSlave’s cycle time (15 ms) delay (10 ms)SlaveOutputpointMin. I/O response time = 8+10+12+15+10 = 55 msCalculation formula = Input ON response time + Master’s cycle time + Slave’scycle time + Output ON response timeMaximum I/O Response Time The CPM1/CPM1A takes the longest to respond under the following circumstances:1, 2, 3...1.
The CPM1/CPM1A receives an input signal just after the input refreshphase of the cycle.2. The Master’s communications servicing just misses the Master-to-Slavetransmission.3. The transmission is completed just after the Slave’s communications servicing ends.I/O Maximum Response Time Input ON response time + Master’s cycle time x 2 + Transmission time x 3 + Output ON response timeInputpointI/O refreshInput ON response timePeripheral port servicingMasterInputbitCPUprocessingProgramexecutionProgramexecutionProgramexecutionMaster #1(Data transmission according to input point)Master to SlaveCPUprocessingTransmissiontimeProgramexecutionSlave #1SlaveProgramexecutionSlave to MasterProgramexecutionTransmissiontimeMaster to SlaveTransmission timeProgramexecutionSlave #2ProgramexecutionSlave #3OutputpointMaximum I/O response time = 8 + 10 x 2 + 12 x 3 + 15 x 3 + 10 = 119 (ms)488Output OFFresponse timeSectionCPM1/CPM1A Cycle Time and I/O Response Time8-18-1-5 Interrupt Processing TimeThis section explains the processing times involved from the time an interrupt isexecuted until the interrupt processing routine is called, and from the time an interrupt processing routine is completed until returning to the initial location.
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