ATmega128 (961723), страница 9
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Crystal Oscillator ConnectionsC2C1XTAL2XTAL1GNDThe Oscillator can operate in three different modes, each optimized for a specific frequency range. The operating mode is selected by the fuses CKSEL3..1 as shown inTable 8.Table 8. Crystal Oscillator Operating ModesCKOPTCKSEL3..1Frequency Range(MHz)Recommended Range for CapacitorsC1 and C2 for Use with Crystals1101(1)0.4 - 0.9–11100.9 - 3.012 pF - 22 pF11113.0 - 8.012 pF - 22 pF0101, 110, 1111.0 -12 pF - 22 pFNote:1. This option should not be used with crystals, only with ceramic resonators.The CKSEL0 fuse together with the SUT1..0 fuses select the start-up times as shown inTable 9.36ATmega1282467M–AVR–11/04ATmega128Table 9. Start-up Times for the Crystal Oscillator Clock SelectionCKSEL000001111Notes:Low-frequency CrystalOscillatorSUT1..0Start-up Time fromPower-down andPower-saveAdditional Delayfrom Reset (VCC= 5.0V)Recommended Usage00(1)258 CK4.1 msCeramic resonator, fastrising power01258 CK(1)65 msCeramic resonator,slowly rising power101K CK(2)–Ceramic resonator,BOD enabled111K CK(2)4.1 msCeramic resonator, fastrising power001K CK(2)65 msCeramic resonator,slowly rising power0116K CK–Crystal Oscillator, BODenabled1016K CK4.1 msCrystal Oscillator, fastrising power1116K CK65 msCrystal Oscillator,slowly rising power1.
These options should only be used when not operating close to the maximum frequency of the device, and only if frequency stability at start-up is not important for theapplication. These options are not suitable for crystals.2. These options are intended for use with ceramic resonators and will ensure frequency stability at start-up. They can also be used with crystals when not operatingclose to the maximum frequency of the device, and if frequency stability at start-up isnot important for the application.To use a 32.768 kHz watch crystal as the clock source for the device, the Low-frequency Crystal Oscillator must be selected by setting the CKSEL fuses to “1001”. Thecrystal should be connected as shown in Figure 19. By programming the CKOPT fuse,the user can enable internal capacitors on XTAL1 and XTAL2, thereby removing theneed for external capacitors.
The internal capacitors have a nominal value of 36 pF.When this Oscillator is selected, start-up times are determined by the SUT fuses asshown in Table 10.Table 10. Start-up Times for the Low-frequency Crystal Oscillator Clock SelectionSUT1..0Start-up Time fromPower-down andPower-saveAdditional Delayfrom Reset (VCC =5.0V)Recommended Usage(1)4.1 msFast rising power or BOD enabled01(1)1K CK65 msSlowly rising power1032K CK65 msStable frequency at start-up0011Note:1K CKReserved1. These options should only be used if frequency stability at start-up is not importantfor the application.372467M–AVR–11/04External RC OscillatorFor timing insensitive applications, the External RC configuration shown in Figure 20can be used.
The frequency is roughly estimated by the equation f = 1/(3RC). C shouldbe at least 22 pF. By programming the CKOPT fuse, the user can enable an internal36 pF capacitor between XTAL1 and GND, thereby removing the need for an externalcapacitor. For more information on Oscillator operation and details on how to choose Rand C, refer to the External RC Oscillator application note.Figure 20.
External RC ConfigurationVCCRNCXTAL2XTAL1CGNDThe Oscillator can operate in four different modes, each optimized for a specific frequency range. The operating mode is selected by the fuses CKSEL3..0 as shown inTable 11.Table 11. External RC Oscillator Operating ModesCKSEL3..0Frequency Range (MHz)01010.1 - 0.901100.9 - 3.001113.0 - 8.010008.0 - 12.0When this Oscillator is selected, start-up times are determined by the SUT fuses asshown in Table 12.Table 12. Start-Up Times for the External RC Oscillator Clock SelectionSUT1..0Start-up Time fromPower-down andPower-saveAdditional Delayfrom Reset(VCC = 5.0V)0018 CK–0118 CK4.1 msFast rising power1018 CK65 msSlowly rising power11(1)4.1 msFast rising power or BOD enabledNote:386 CKRecommended UsageBOD enabled1.
This option should not be used when operating close to the maximum frequency ofthe device.ATmega1282467M–AVR–11/04ATmega128Calibrated Internal RCOscillatorThe Calibrated Internal RC Oscillator provides a fixed 1.0, 2.0, 4.0, or 8.0 MHz clock. Allfrequencies are nominal values at 5V and 25°C. This clock may be selected as the system clock by programming the CKSEL fuses as shown in Table 13. If selected, it willoperate with no external components. The CKOPT fuse should always be unprogrammed when using this clock option.
During Reset, hardware loads the calibrationbyte for the 1MHz oscillator into the OSCCAL Register and thereby automatically calibrates the RC Oscillator. At 5V, 25°C and 1.0 MHz Oscillator frequency selected, thiscalibration gives a frequency within ± 3% of the nominal frequency.
Using calibrationmethods as described in application notes available at www.atmel.com/avr it is possibleto achieve ± 1% accuracy at any given VCC and Temperature. When this Oscillator isused as the chip clock, the Watchdog Oscillator will still be used for the Watchdog Timerand for the Reset Time-out. For more information on the pre-programmed calibrationvalue, see the section “Calibration Byte” on page 291.Table 13.
Internal Calibrated RC Oscillator Operating ModesNote:CKSEL3..0Nominal Frequency (MHz)0001(1)1.000102.000114.001008.01. The device is shipped with this option selected.When this Oscillator is selected, start-up times are determined by the SUT fuses asshown in Table 14. XTAL1 and XTAL2 should be left unconnected (NC).Table 14. Start-up Times for the Internal Calibrated RC Oscillator Clock SelectionSUT1..0Start-up Time from Powerdown and Power-saveAdditional Delay fromReset (VCC = 5.0V)006 CK–016 CK4.1 msFast rising power6 CK65 msSlowly rising power(1)1011Note:Oscillator Calibration Register– OSCCALBOD enabledReserved1. The device is shipped with this option selected.BitRead/WriteInitial ValueNote:Recommended Usage76543210CAL7CAL6CAL5CAL4CAL3CAL2CAL1CAL0R/WR/WR/WR/WR/WR/WR/WR/WOSCCALDevice Specific Calibration ValueOSCCAL Register is not available in ATmega103 compatibility mode.• Bits 7..0 – CAL7..0: Oscillator Calibration ValueWriting the calibration byte to this address will trim the Internal Oscillator to remove process variations from the Oscillator frequency.
During Reset, the 1 MHz calibration valuewhich is located in the signature row high byte (address 0x00) is automatically loadedinto the OSCCAL Register. If the internal RC is used at other frequencies, the calibrationvalues must be loaded manually. This can be done by first reading the signature row bya programmer, and then store the calibration values in the Flash or EEPROM.
Then thevalue can be read by software and loaded into the OSCCAL Register. When OSCCAL is392467M–AVR–11/04zero, the lowest available frequency is chosen. Writing non-zero values to this registerwill increase the frequency of the Internal Oscillator.
Writing $FF to the register gives thehighest available frequency. The calibrated Oscillator is used to time EEPROM andFlash access. If EEPROM or Flash is written, do not calibrate to more than 10% abovethe nominal frequency. Otherwise, the EEPROM or Flash write may fail. Note that theOscillator is intended for calibration to 1.0, 2.0, 4.0, or 8.0 MHz. Tuning to other values isnot guaranteed, as indicated in Table 15.Table 15.
Internal RC Oscillator Frequency Range.External ClockOSCCAL ValueMin Frequency in Percentage ofNominal Frequency (%)Max Frequency in Percentage ofNominal Frequency (%)$0050100$7F75150$FF100200To drive the device from an external clock source, XTAL1 should be driven as shown inFigure 21. To run the device on an external clock, the CKSEL fuses must be programmed to “0000”. By programming the CKOPT fuse, the user can enable an internal36 pF capacitor between XTAL1 and GND.Figure 21.
External Clock Drive ConfigurationEXTERNALCLOCKSIGNALWhen this clock source is selected, start-up times are determined by the SUT fuses asshown in Table 16.Table 16. Start-up Times for the External Clock SelectionSUT1..0Start-up Time from Powerdown and Power-saveAdditional Delay fromReset (VCC = 5.0V)006 CK–016 CK4.1 msFast rising power106 CK65 msSlowly rising power11Recommended UsageBOD enabledReservedWhen applying an external clock, it is required to avoid sudden changes in the appliedclock frequency to ensure stable operation of the MCU. A variation in frequency of morethan 2% from one clock cycle to the next can lead to unpredictable behavior.
It isrequired to ensure that the MCU is kept in Reset during such changes in the clockfrequency.40ATmega1282467M–AVR–11/04ATmega128Timer/Counter OscillatorFor AVR microcontrollers with Timer/Counter Oscillator pins (TOSC1 and TOSC2), thecrystal is connected directly between the pins. No external capacitors are needed. TheOscillator is optimized for use with a 32.768 kHz watch crystal. Applying an externalclock source to TOSC1 is not recommended.XTAL Divide Control Register– XDIVThe XTAL Divide Control Register is used to divide the Source clock frequency by anumber in the range 2 - 129. This feature can be used to decrease power consumptionwhen the requirement for processing power is low.Bit76543210XDIVENXDIV6XDIV5XDIV4XDIV3XDIV2XDIV1XDIV0Read/WriteR/WR/WR/WR/WR/WR/WR/WR/WInitial Value00000000XDIV• Bit 7 – XDIVEN: XTAL Divide EnableWhen the XDIVEN bit is written one, the clock frequency of the CPU and all peripherals(clkI/O, clkADC, clkCPU, clkFLASH) is divided by the factor defined by the setting of XDIV6 XDIV0.
This bit can be written run-time to vary the clock frequency as suitable to theapplication.• Bits 6..0 – XDIV6..XDIV0: XTAL Divide Select Bits 6 - 0These bits define the division factor that applies when the XDIVEN bit is set (one). If thevalue of these bits is denoted d, the following formula defines the resulting CPU andperipherals clock frequency fCLK:Source clockf CLK = ---------------------------------129 – dThe value of these bits can only be changed when XDIVEN is zero. When XDIVEN iswritten to one, the value written simultaneously into XDIV6..XDIV0 is taken as the division factor.
When XDIVEN is written to zero, the value written simultaneously intoXDIV6..XDIV0 is rejected. As the divider divides the master clock input to the MCU, thespeed of all peripherals is reduced when a division factor is used.Note:When the system clock is divided, Timer/Counter0 can be used with Asynchronous clockonly. The frequency of the asynchronous clock must be lower than 1/4th of the frequencyof the scaled down Source clock. Otherwise, interrupts may be lost, and accessing theTimer/Counter0 registers may fail.412467M–AVR–11/04Power Managementand Sleep ModesSleep modes enable the application to shut down unused modules in the MCU, therebysaving power.
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