Advanced global navigation satellite system receiver design (797918), страница 28
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Therefore, the high-gain mode was selected. The signal is quantisedto 12-bits and output using an offset binary data format (0 to 4095). In order tocorrectly emulate a GNSS receiver, the FPGA correlator in the PIF receiver mustprovide digital AGC (automatic gain control) to adjust for changes in the signal powerlevel. Therefore, it is desirable to re-quantise the signal to 2-bits, representing thesign (SIGN) and magnitude (MAG) of the incoming signal. The SIGN bit is simplytaken as the MSB of the data from the ADC.The MAG is determined by averaging the bottom 11-bits of the ADC over a numberof input samples, effectively setting the response time for the digital AGC.
Theresponse time of the AGC must be considerably less than the settling time of thereceiver’s tracking loops but large enough to remove noisy measurements. Generally,RF front architectures use AGC time constants from 1 ms to 10 ms [Zarlink 2005][Nemerix 2005]. To enable the FPGA to run at high frequencies (>50MHz) the191Prototype receiver testing and resultsnumber of samples is kept to a power of 2 and the update rate was set to 1.3 ms.
Thedistribution of the digital AGC is shown in Figure 9-2.Figure 9-2, Distribution of digital AGCUsing the mean square accumulation values given in Table 8-3, with the statisticaldistribution given in Figure 9-2, the noise floor of the IF receiver can be calculated asfollows.NFIF = 2 × (0.37 × 22.5 + (1 − 0.37 ) × 2.5) × f s × T = 990,0009–1This noise floor value can be verified by measuring the mean square of the I (wIII) andQ (wQII) correlations when correlating thermal noise at the receiver input.
Figure 9-3shows I and Q samples taken every second for a ten-minute data set, which throughmany trials was found to achieve good agreement with the theoretical noise floorvalue.192Prototype receiver testing and resultsFigure 9-3, IF receiver noise floor with no signal present (50 MHz sampling)The typical output of the IF receiver in PSK mode is shown in Figure 9-4. In this case2 channels have been implemented and both are tracking the same SV at a signal tonoise ratio of around 14.4 dB, which by Equation 8–26 (T = 1 ms) corresponds to acarrier to noise of 44.4 dB-Hz.
Pseudorange is given in metres and integrated carrierphase in cycles. The FLL and PLL counts allow us to monitor the acquisition statusof the signals by counting how many epochs out of a thousand the tracking loop isusing either FLL or PLL. Other outputs such as the raw correlation values and inputsignal samples may also be output.ChannelEstimatedsignal-tonoise ratioDopplerfrequencyoffsetMissedaccumulationsDopplerbinPseudorangeIntegrated carrier FLL countphasePLL countFigure 9-4, Typical PIF receiver output in GPS operation193Prototype receiver testing and resultsThe measurement period, a TIC, is 1/10th of a second, although the data is normallyoutput every second to reduce loading of the processor.
The pseudorange ρi, ismeasured by calculating the time of flight of the GNSS signal as follows [Kaplan andHegarty 2006].ρ i (n) = c × (TR (n) − TTi (n) ) (m)9–2TR(n) is the time based on the receiver’s clock at epoch n, TTi(n) is the time oftransmission the signal based on the clock of the transmitting satellite i and c is thespeed of an electromagnetic wave in a vacuum. In a cold start situation, TR(n) mustbe a guess, normally TTi(n) plus a nominal propagation time. Assuming propersynchronisation with the incoming signal, TTi(n) is determined from the 20ms and1ms epoch counters ( X E 20 and X E1 ), half chip counter ( X HC ) and code DCO phase( τ DCO ) in milliseconds from the correlator sampled on a TIC.
For GPS C/A code thetransmit time (ms) is calculated as follows.TTi (n) = (20 × X E 20 ) + X E +X HC+ τ DCO2046(ms )9–3A more generic approach, applicable to all GNSS signals can be written asTTi (n) = (LD × X D ) +1 X× X E + HCLE N HC + τ DCO(ms )9–4LD is the length of one data bit in milliseconds, XD is the data bit counter, LE is thelength of one code epoch in milliseconds and NHC is the number of half chips in acode epoch.The integrated carrier phase or integrated Doppler measurement is a measure of thenumber of carrier cycles between two measurement intervals. It is formed from thecarrier cycle counter ( X CC ) and the carrier DCO phase from the correlator sampled ona TIC. The cycle counter is reset every TIC and the fractional phase is determined by194Prototype receiver testing and results′ to the previous phase value φDCO . If λC is thecomparing the current DCO phase φDCOcarrier wavelength the integrated carrier phase measurement in metres can be writtenas follows.′ − φDCO ) × λCICPi = ( X CC + φDCO(m)9–5The integrated carrier phase is used to form a precise delta range measurementbetween measurement intervals and velocity measurements.
The noise on the carrierphase measurements is generally at least two orders of magnitude less than that of theequivalent noise on the code phase measurements. The carrier measurements areindependent of the code phase measurements, therefore, the integrated carrier phasecan be used to smooth the pseudorange measurements from the code loop.It was desirable to compare the IF receiver to an SGR receiver tracking the samesignal source, a ‘zero baseline’ test. This provides a ‘sanity check’ for the new FPGAcorrelator architecture, proving the performance of the digital section equivalent to theZarlink chipset. The simulator RF output was fed to an LNA whose output was splitin two, one end fed to the IF receiver and one end to an SGR receiver with additionalgain stages bypassed.
The difference in RF gains must be kept to a minimum toperform a fair comparison. The cable lengths were identical and each receiver usesidentical RF front-end architectures. Therefore, any variation in signal power canonly come from a difference in the gain stages between the RF front ends. Figure 9-5shows the carrier to noise estimated by the two receivers against the output of thesimulator. There is an average 0.64 dB offset between the receivers due to differencesin the RF amplifiers. Removing this offset the receivers agree with each other to0.118 dB (rms) across the data set.195Prototype receiver testing and resultsFigure 9-5, Zero baseline test between IF receiver and SGR-05The pseudorange and integrated carrier phase is commonly used in order to measurethe noise on the code tracking loop, the DLL [De Wilde et al 2004].
The integratedcarrier phase can be used as a precise delta range measurement because noise on thecarrier loop is on the order of millimetres, at least two orders of magnitude better thanthe code loop noise (≈ 0.3 – 2 m). Therefore, a good estimate of the noise of the codeloop can be achieved by taking an average of the pseudorange minus the integratedcarrier phase between measurement intervals. An arbitrary initial offset of carriercycles must also be removed. It can be seen from Figure 9-6 that the noise present onthe pseudorange minus the integrated carrier phase strongly agrees with theoreticalpredictions for PSK given by Equation 4–16.
The variation between channelstracking the same incoming signal is shown to negligible (≈7 cm).196Prototype receiver testing and resultsFigure 9-6, Pseudorange minus integrated carrier phaseConfiguring the receiver to output raw correlation values allows the user to monitorthe receiver’s ability to decode the navigational data. This is achieved through an I/Qplot, from which the phase error can be derived. Figure 9-7 shows an I/Q plot takenfrom the PIF receiver at 45 dB-Hz and 34 dB-Hz carrier to noise. A carrier to noisedensity of 35 dB-Hz corresponds to an r.m.s. signal to noise per correlation of 5 dBfor an integration period of 1 ms. Sub-frame parity errors in the decoded data occur atsignal to noise levels less than 5 dB [Mitel 1996], this is illustrated in Figure 9-7 b)where noise induces a significant number samples to have incorrect sign at anequivalent signal to noise of 4 dB per correlation.197Prototype receiver testing and resultsa)b)Figure 9-7, IQ plot from the PIF receiver: a) 45 dB-Hz b) 34 dB-HzTo evaluate precisely the receiver code tracking performance against theoreticallyderived values we connect the receiver to the bench IF signal generator described inChapter 7.
This signal generator is capable of producing an IF GNSS signal with aprecisely calibrated level of additive noise. Repeating from Equation 7–17 the carrierto noise density of the IF signal with digitally synthesized noise is given byCN0=A 2 × f DAC2×KNσN29–6where A is the amplitude level given to the PRN code sequence, fDAC is the DACsampling rate, σN is the r.m.s. value of the synthesised noise and KN is the noisedecimation factor. We choose an IF of 20.46 MHz, a DAC sampling rate offDAC = 81.84 MHz and implement a noise Gaussian generator with standard deviationof σ N = 24.292 . The noise update rate was kept constant at 1.023 MHz(K N= 80 ) and the PRN code sequence amplitude, A varied in steps of 0.5 from 1 to16.5.
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