ATmega8 (Скамко)

Features• High-performance, Low-power AVR® 8-bit Microcontroller• Advanced RISC Architecture•••••••– 130 Powerful Instructions – Most Single-clock Cycle Execution– 32 x 8 General Purpose Working Registers– Fully Static Operation– Up to 16 MIPS Throughput at 16 MHz– On-chip 2-cycle MultiplierNonvolatile Program and Data Memories– 8K Bytes of In-System Self-Programmable FlashEndurance: 10,000 Write/Erase Cycles– Optional Boot Code Section with Independent Lock BitsIn-System Programming by On-chip Boot ProgramTrue Read-While-Write Operation– 512 Bytes EEPROMEndurance: 100,000 Write/Erase Cycles– 1K Byte Internal SRAM– Programming Lock for Software SecurityPeripheral Features– Two 8-bit Timer/Counters with Separate Prescaler, one Compare Mode– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and CaptureMode– Real Time Counter with Separate Oscillator– Three PWM Channels– 8-channel ADC in TQFP and MLF packageEight Channels 10-bit Accuracy– 6-channel ADC in PDIP packageEight Channels 10-bit Accuracy– Byte-oriented Two-wire Serial Interface– Programmable Serial USART– Master/Slave SPI Serial Interface– Programmable Watchdog Timer with Separate On-chip Oscillator– On-chip Analog ComparatorSpecial Microcontroller Features– Power-on Reset and Programmable Brown-out Detection– Internal Calibrated RC Oscillator– External and Internal Interrupt Sources– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, andStandbyI/O and Packages– 23 Programmable I/O Lines– 28-lead PDIP, 32-lead TQFP, and 32-pad MLFOperating Voltages– 2.7 - 5.5V (ATmega8L)– 4.5 - 5.5V (ATmega8)Speed Grades– 0 - 8 MHz (ATmega8L)– 0 - 16 MHz (ATmega8)Power Consumption at 4 Mhz, 3V, 25°C– Active: 3.6 mA– Idle Mode: 1.0 mA– Power-down Mode: 0.5 µA8-bitwith 8K BytesIn-SystemProgrammableFlashATmega8ATmega8L2486O–AVR–10/04Pin ConfigurationsPDIP(RESET) PC6(RXD) PD0(TXD) PD1(INT0) PD2(INT1) PD3(XCK/T0) PD4VCCGND(XTAL1/TOSC1) PB6(XTAL2/TOSC2) PB7(T1) PD5(AIN0) PD6(AIN1) PD7(ICP1) PB012345678910111213142827262524232221201918171615PC5 (ADC5/SCL)PC4 (ADC4/SDA)PC3 (ADC3)PC2 (ADC2)PC1 (ADC1)PC0 (ADC0)GNDAREFAVCCPB5 (SCK)PB4 (MISO)PB3 (MOSI/OC2)PB2 (SS/OC1B)PB1 (OC1A)3231302928272625PD2 (INT0)PD1 (TXD)PD0 (RXD)PC6 (RESET)PC5 (ADC5/SCL)PC4 (ADC4/SDA)PC3 (ADC3)PC2 (ADC2)TQFP Top View123456782423222120191817PC1 (ADC1)PC0 (ADC0)ADC7GNDAREFADC6AVCCPB5 (SCK)2423222120191817PC1 (ADC1)PC0 (ADC0)ADC7GNDAREFADC6AVCCPB5 (SCK)(T1) PD5(AIN0) PD6(AIN1) PD7(ICP1) PB0(OC1A) PB1(SS/OC1B) PB2(MOSI/OC2) PB3(MISO) PB4910111213141516(INT1) PD3(XCK/T0) PD4GNDVCCGNDVCC(XTAL1/TOSC1) PB6(XTAL2/TOSC2) PB73231302928272625PD2 (INT0)PD1 (TXD)PD0 (RXD)PC6 (RESET)PC5 (ADC5/SCL)PC4 (ADC4/SDA)PC3 (ADC3)PC2 (ADC2)MLF Top View12345678(T1) PD5(AIN0) PD6(AIN1) PD7(ICP1) PB0(OC1A) PB1(SS/OC1B) PB2(MOSI/OC2) PB3(MISO) PB4910111213141516(INT1) PD3(XCK/T0) PD4GNDVCCGNDVCC(XTAL1/TOSC1) PB6(XTAL2/TOSC2) PB72NOTE:The large center pad underneath the MLFpackages is made of metal and internallyconnected to GND.

It should be solderedor glued to the PCB to ensure goodmechanical stability. If the center pad isleft unconneted, the package mightloosen from the PCB.ATmega8(L)2486O–AVR–10/04ATmega8(L)OverviewThe ATmega8 is a low-power CMOS 8-bit microcontroller based on the AVR RISCarchitecture. By executing powerful instructions in a single clock cycle, the ATmega8achieves throughputs approaching 1 MIPS per MHz, allowing the system designer tooptimize power consumption versus processing speed.Block DiagramFigure 1. Block DiagramXTAL1RESETPC0 - PC6PB0 - PB7VCCXTAL2GNDPORTC DRIVERS/BUFFERSPORTB DRIVERS/BUFFERSPORTC DIGITAL INTERFACEPORTB DIGITAL INTERFACEMUX &ADCADCINTERFACEPROGRAMCOUNTERSTACKPOINTERPROGRAMFLASHSRAMTWIAGNDAREFINSTRUCTIONREGISTERGENERALPURPOSEREGISTERSTIMERS/COUNTERSOSCILLATORINTERNALOSCILLATORWATCHDOGTIMEROSCILLATORXINSTRUCTIONDECODERYMCU CTRL.& TIMINGZCONTROLLINESALUINTERRUPTUNITAVR CPUSTATUSREGISTEREEPROMPROGRAMMINGLOGICSPIUSART+-COMP.INTERFACEPORTD DIGITAL INTERFACEPORTD DRIVERS/BUFFERSPD0 - PD732486O–AVR–10/04The AVR core combines a rich instruction set with 32 general purpose working registers.All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowingtwo independent registers to be accessed in one single instruction executed in one clockcycle.

The resulting architecture is more code efficient while achieving throughputs up toten times faster than conventional CISC microcontrollers.The ATmega8 provides the following features: 8K bytes of In-System ProgrammableFlash with Read-While-Write capabilities, 512 bytes of EEPROM, 1K byte of SRAM, 23general purpose I/O lines, 32 general purpose working registers, three flexibleTimer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface, a 6-channel ADC (eightchannels in TQFP and MLF packages) with 10-bit accuracy, a programmable WatchdogTimer with Internal Oscillator, an SPI serial port, and five software selectable power saving modes.

The Idle mode stops the CPU while allowing the SRAM, Timer/Counters,SPI port, and interrupt system to continue functioning. The Power-down mode saves theregister contents but freezes the Oscillator, disabling all other chip functions until thenext Interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device issleeping.

The ADC Noise Reduction mode stops the CPU and all I/O modules exceptasynchronous timer and ADC, to minimize switching noise during ADC conversions. InStandby mode, the crystal/resonator Oscillator is running while the rest of the device issleeping. This allows very fast start-up combined with low-power consumption.The device is manufactured using Atmel’s high density non-volatile memory technology.The Flash Program memory can be reprogrammed In-System through an SPI serialinterface, by a conventional non-volatile memory programmer, or by an On-chip bootprogram running on the AVR core. The boot program can use any interface to downloadthe application program in the Application Flash memory.

Software in the Boot FlashSection will continue to run while the Application Flash Section is updated, providingtrue Read-While-Write operation. By combining an 8-bit RISC CPU with In-System SelfProgrammable Flash on a monolithic chip, the Atmel ATmega8 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many embeddedcontrol applications.The ATmega8 AVR is supported with a full suite of program and system developmenttools, including C compilers, macro assemblers, program debugger/simulators, In-Circuit Emulators, and evaluation kits.Disclaimer4Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology.

Minand Max values will be available after the device is characterized.ATmega8(L)2486O–AVR–10/04ATmega8(L)Pin DescriptionsVCCDigital supply voltage.GNDGround.Port B (PB7..PB0)XTAL1/XTAL2/TOSC1/TOSC2Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for eachbit). The Port B output buffers have symmetrical drive characteristics with both high sinkand source capability.

As inputs, Port B pins that are externally pulled low will sourcecurrent if the pull-up resistors are activated. The Port B pins are tri-stated when a resetcondition becomes active, even if the clock is not running.Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscillator amplifier and input to the internal clock operating circuit.Depending on the clock selection fuse settings, PB7 can be used as output from theinverting Oscillator amplifier.If the Internal Calibrated RC Oscillator is used as chip clock source, PB7..6 is used asTOSC2..1 input for the Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set.The various special features of Port B are elaborated in “Alternate Functions of Port B”on page 56 and “System Clock and Clock Options” on page 23.Port C (PC5..PC0)Port C is an 7-bit bi-directional I/O port with internal pull-up resistors (selected for eachbit).

The Port C output buffers have symmetrical drive characteristics with both high sinkand source capability. As inputs, Port C pins that are externally pulled low will sourcecurrent if the pull-up resistors are activated. The Port C pins are tri-stated when a resetcondition becomes active, even if the clock is not running.PC6/RESETIf the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the electrical characteristics of PC6 differ from those of the other pins of Port C.If the RSTDISBL Fuse is unprogrammed, PC6 is used as a Reset input. A low level onthis pin for longer than the minimum pulse length will generate a Reset, even if the clockis not running.

The minimum pulse length is given in Table 15 on page 36. Shorterpulses are not guaranteed to generate a Reset.The various special features of Port C are elaborated on page 59.Port D (PD7..PD0)Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for eachbit). The Port D output buffers have symmetrical drive characteristics with both high sinkand source capability. As inputs, Port D pins that are externally pulled low will sourcecurrent if the pull-up resistors are activated. The Port D pins are tri-stated when a resetcondition becomes active, even if the clock is not running.Port D also serves the functions of various special features of the ATmega8 as listed onpage 61.RESETReset input.