ATmega128 (Скамко), страница 10

The AVR provides various sleep modes allowing the user to tailor thepower consumption to the application’s requirements.To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic oneand a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in theMCUCR Register select which sleep mode (Idle, ADC Noise Reduction, Power-down,Power-save, Standby, or Extended Standby) will be activated by the SLEEP instruction.See Table 17 for a summary.

If an enabled interrupt occurs while the MCU is in a sleepmode, the MCU wakes up. The MCU is then halted for four cycles in addition to thestart-up time, it executes the interrupt routine, and resumes execution from the instruction following SLEEP. The contents of the register file and SRAM are unaltered whenthe device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakesup and executes from the Reset Vector.Figure 18 on page 34 presents the different clock systems in the ATmega128, and theirdistribution. The figure is helpful in selecting an appropriate sleep mode.MCU Control Register –MCUCRThe MCU Control Register contains control bits for power management.Bit76543210SRESRW10SESM1SM0SM2IVSELIVCERead/WriteR/WR/WR/WR/WR/WR/WR/WR/WInitial Value00000000MCUCR• Bit 5 – SE: Sleep EnableThe SE bit must be written to logic one to make the MCU enter the Sleep mode whenthe SLEEP instruction is executed.

To avoid the MCU entering the Sleep mode unless itis the programmers purpose, it is recommended to write the Sleep Enable (SE) bit toone just before the execution of the SLEEP instruction and to clear it immediately afterwaking up.• Bits 4..2 – SM2..0: Sleep Mode Select Bits 2, 1, and 0These bits select between the six available sleep modes as shown in Table 17.Table 17. Sleep Mode SelectNote:42SM2SM1SM0Sleep Mode000Idle001ADC Noise Reduction010Power-down011Power-save100Reserved101Reserved110Standby(1)111Extended Standby(1)1.

Standby mode and Extended Standby mode are only available with external crystalsor resonators.ATmega1282467M–AVR–11/04ATmega128Idle ModeWhen the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enterIdle mode, stopping the CPU but allowing SPI, USART, Analog Comparator, ADC, Twowire Serial Interface, Timer/Counters, Watchdog, and the interrupt system to continueoperating. This sleep mode basically halts clkCPU and clkFLASH, while allowing the otherclocks to run.Idle mode enables the MCU to wake up from external triggered interrupts as well asinternal ones like the Timer Overflow and USART Transmit Complete interrupts. Ifwake-up from the Analog Comparator interrupt is not required, the Analog Comparatorcan be powered down by setting the ACD bit in the Analog Comparator Control and Status Register – ACSR.

This will reduce power consumption in Idle mode. If the ADC isenabled, a conversion starts automatically when this mode is entered.ADC Noise ReductionModeWhen the SM2..0 bits are written to 001, the SLEEP instruction makes the MCU enterADC Noise Reduction mode, stopping the CPU but allowing the ADC, the ExternalInterrupts, the Two-wire Serial Interface address watch, Timer/Counter0 and theWatchdog to continue operating (if enabled). This sleep mode basically halts clk I/O,clkCPU, and clkFLASH, while allowing the other clocks to run.This improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC is enabled, a conversion starts automatically when this mode isentered.

Apart form the ADC Conversion Complete interrupt, only an External Reset, aWatchdog Reset, a Brown-out Reset, a Two-wire Serial Interface address match interrupt, a Timer/Counter0 interrupt, an SPM/EEPROM ready interrupt, an External LevelInterrupt on INT7:4, or an External Interrupt on INT3:0 can wake up the MCU from ADCNoise Reduction mode.Power-down ModeWhen the SM2..0 bits are written to 010, the SLEEP instruction makes the MCU enterPower-down mode.

In this mode, the External Oscillator is stopped, while the ExternalInterrupts, the Two-wire Serial Interface address watch, and the Watchdog continueoperating (if enabled). Only an External Reset, a Watchdog Reset, a Brown-out Reset, aTwo-wire Serial Interface address match interrupt, an External Level Interrupt onINT7:4, or an External Interrupt on INT3:0 can wake up the MCU. This sleep mode basically halts all generated clocks, allowing operation of asynchronous modules only.Note that if a level triggered interrupt is used for wake-up from Power-down mode, thechanged level must be held for some time to wake up the MCU.

Refer to “External Interrupts” on page 87 for details.When waking up from Power-down mode, there is a delay from the wake-up conditionoccurs until the wake-up becomes effective. This allows the clock to restart and becomestable after having been stopped. The wake-up period is defined by the same CKSELfuses that define the Reset Time-out period, as described in “Clock Sources” on page35.Power-save ModeWhen the SM2..0 bits are written to 011, the SLEEP instruction makes the MCU enterPower-save mode.

This mode is identical to Power-down, with one exception:If Timer/Counter0 is clocked asynchronously, i.e., the AS0 bit in ASSR is set,Timer/Counter0 will run during sleep. The device can wake up from either Timer Overflow o r Ou tput Comp are event from Tim er/Coun ter0 if the corre sp ond ingTimer/Counter0 interrupt enable bits are set in TIMSK, and the global interrupt enablebit in SREG is set.If the Asynchronous Timer is NOT clocked asynchronously, Power-down mode is recommended instead of Power-save mode because the contents of the registers in the432467M–AVR–11/04asynchronous timer should be considered undefined after wake-up in Power-save modeif AS0 is 0.This sleep mode basically halts all clocks except clkASY, allowing operation only of asynchronous modules, including Timer/Counter0 if clocked asynchronously.Standby ModeWhen the SM2..0 bits are 110 and an External Crystal/Resonator clock option isselected, the SLEEP instruction makes the MCU enter Standby mode. This mode isidentical to Power-down with the exception that the Oscillator is kept running.

FromStandby mode, the device wakes up in 6 clock cycles.Extended Standby ModeWhen the SM2..0 bits are 111 and an external crystal/resonator clock option is selected,the SLEEP instruction makes the MCU enter Extended Standby mode. This mode isidentical to Power-save mode with the exception that the Oscillator is kept running.From Extended Standby mode, the device wakes up in six clock cycles.Table 18. Active Clock Domains and Wake Up Sources in the Different Sleep ModesActive Clock DomainsSleepModeOscillatorsclkCPU clkFLASH clkIO clkADC clkASYIdleXADCNoiseReductionMain ClockSourceEnabledTimerOscEnabled44ADCOtherI/OXXX(2)XXXXXXXXX(2)X(3)XXXXX(3)XX(3)XX(3)XX(3)XStandby(1)Notes:Timer 0SPM/EEPROMReadyXX(2)X(2)XExtendedStandby(1)INT7:0TWIAddressMatchXPowerdownPowersaveWake Up SourcesX(2)XX(2)X(2)X(2)1.

External Crystal or resonator selected as clock source2. If AS0 bit in ASSR is set3. Only INT3:0 or level interrupt INT7:4ATmega1282467M–AVR–11/04ATmega128Minimizing PowerConsumptionThere are several issues to consider when trying to minimize the power consumption inan AVR controlled system. In general, sleep modes should be used as much as possible, and the sleep mode should be selected so that as few as possible of the device’sfunctions are operating. All functions not needed should be disabled. In particular, thefollowing modules may need special consideration when trying to achieve the lowestpossible power consumption.Analog to Digital ConverterIf enabled, the ADC will be enabled in all sleep modes.

To save power, the ADC shouldbe disabled before entering any sleep mode. When the ADC is turned off and on again,the next conversion will be an extended conversion. Refer to “Analog to Digital Converter” on page 231 for details on ADC operation.Analog ComparatorWhen entering Idle mode, the Analog Comparator should be disabled if not used. Whenentering ADC Noise Reduction mode, the Analog Comparator should be disabled.

In theother sleep modes, the Analog Comparator is automatically disabled. However, if theAnalog Comparator is set up to use the Internal Voltage Reference as input, the AnalogComparator should be disabled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled, independent of sleep mode. Refer to “Analog Comparator” onpage 228 for details on how to configure the Analog Comparator.Brown-out DetectorIf the Brown-out Detector is not needed in the application, this module should be turnedoff. If the Brown-out Detector is enabled by the BODEN fuse, it will be enabled in allsleep modes, and hence, always consume power.

In the deeper sleep modes, this willcontribute significantly to the total current consumption. Refer to “Brown-out Detector”on page 45 for details on how to configure the Brown-out Detector.Internal Voltage ReferenceThe Internal Voltage Reference will be enabled when needed by the Brown-out Detector, the Analog Comparator or the ADC. If these modules are disabled as described inthe sections above, the internal voltage reference will be disabled and it will not be consuming power.

When turned on again, the user must allow the reference to start upbefore the output is used. If the reference is kept on in sleep mode, the output can beused immediately. Refer to “Internal Voltage Reference” on page 52 for details on thestart-up time.Watchdog TimerIf the Watchdog Timer is not needed in the application, this module should be turned off.If the Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence,always consume power. In the deeper sleep modes, this will contribute significantly tothe total current consumption.

Refer to “Watchdog Timer” on page 52 for details on howto configure the Watchdog Timer.Port PinsWhen entering a sleep mode, all port pins should be configured to use minimum power.The most important thing is then to ensure that no pins drive resistive loads. In sleepmodes where the both the I/O clock (clkI/O) and the ADC clock (clkADC) are stopped, theinput buffers of the device will be disabled. This ensures that no power is consumed bythe input logic when not needed. In some cases, the input logic is needed for detectingwake-up conditions, and it will then be enabled. Refer to the section “Digital InputEnable and Sleep Modes” on page 67 for details on which pins are enabled.