Roland A. - PVD for microelectronics (779636), страница 63
Текст из файла (страница 63)
Higher Nz/Ar ratios led progressively to a mixture of amorphousand crystalline Ta2N, and finally fcc-TaN. Clearly the evolution of phaseand microstructure make reactive PVD of TaN a more complicated systemthan that of PVD TiN and suggest that very good control of process conditions (e.g., flow ratio and substrate temperature) may be required to implement the process in a production environment. This advice holds trueeven in the case of elemental Ta, which can deposit in either the a- or/3phase depending on sputter deposition temperature, pressure, and substratetype. For example, workers have reported that sputtering Ta in 3 Torr of Aronto Si wafers produced films of/3-Ta for heater set-point temperaturebelow 550~ (i.e., wafer temperature below 400~at which point c~-Tabegan to form. By either raising the Ar pressure to 8 mTorr or depositingon SiO 2, the temperature of the c~-to-/3 transition could be reduced to aheater set point of 400~ and 350~ respectively [9.55].PVD MATERIALSAND PROCESSES339On the positive side, PVD Ta films have been found to be more directional than PVD Ti films and highly conformal in high aspect ratio structures [9.56].
Due to the much greater mass of ]8~Ta compared to 48Ti, onewould expect Ta atoms to be deflected less by scattering with the Ar working gas, and hence to retain their as-sputtered directionality. This is reflected in Fig. 9.36, which shows the improved bottom coverage of 1:1 collimated PVD Ta over PVD Ti deposited with even greater (1.5:1)collimation. In addition, the deposition rate of Ta has been found to be several times that of Ti under comparable collimation conditions [9.55].
Theimproved conformality has been attributed to the reflection coefficient ofTa atoms increasing very steeply with decreasing angle of incidence ~ adependence that may reflect a relatively high population of energeticatoms in the incident Ta flux [9.56]. As a consequence, near-normal-incidence Ta atoms that hit at the top of the via sidewalls have an effectivesticking coefficient less than unity and are reflected and redistributed muchdeeper into the structure.
The net result is more conformal sidewall coverage and possibly increased bottom coverage as well. In addition, a highlydirectional incident flux of Ta (e.g., using collimation or longer throw distance) can then provide quite good sidewall coverage, which is contrary towhat one observes for atoms such as Ti.100~.i80v60>0(bE00m9ei-l-.......Standard 1:1 x 518" 1.5:1 x 5)8"-"i--iIi]-- ' -iii~-- ~ . - - i - - i - - i - - i - i - - - i - - - i - - - - i - - - i - - - - i - - _~\~i~i~,;,;~i~\i,;;iii,iii-,- _~ ~,,.o-, ~ - - i - - , - - ~-- ; - - i - - - , t----i--: o\:_~:o~.9 i~:- t - - 9~L~ - " ~ l i t"-e -I ~40_i _ ~ ~ ~ i,~.-,-201--0i10--..t- ~ t -..- -I- -_.'_i_ L~_ i _ _ i _ ~ _~~11112L--~ _:-~-?-i--.-!.-.~.oo~.-.F._.!-..!..9~ 9- - f" 9- t -.i3lL4115l. - .
- 16I7Aspect RatioFIG. 9.36in ref. 9.55.ComparisonThePVDof step coverageTa wasdepositedof PVDusingTi anda 1"1 a s p e c tPVDTa (checkeredratio collimator.boxes)basedon dataR. POWELL AND S. M. ROSSNAGEL3409.9 PVD and CVDPVD has historically been used to deposit conductors for contacts, barriers, liners, and wiring in multilevel metallization.
On the other hand, withthe notable exception of CVD W plugs (which dominate VLSI devicewiring), CVD has been used to deposit insulators for dielectric isolationbetween the lines (so-called gap fill) and between the levels. AlthoughPVD has been used to deposit thin high-dielectric constant insulators forDRAM storage capacitors (e.g., BaxSr~_xTiO 3 - BST), it is unlikely thatPVD will be used for thick dielectric isolation in advanced devices due toits limited step coverage and low deposition rate. Hence, there is growinginterest in CVD metallization for ULSI devices due primarily to its improved conformality and fill capability.Figure 9.37 uses TiN deposition to show in a simple schematic way thedifference between PVD and CVD, and the two methods are further compared in Fig. 9.38.
Of note, PVD is carried out in a process chamber having high or ultrahigh vacuum base pressure ( < 10 -8 Torr) and mTorr-typePhysical Vapor Deposition(PVD)Chemical Vapor Deposition(CVD)Gas InletsliIGasInlets_~. =-I~~Ar +'J"~e1/N2TiTiN..1 Silicon Wafe/]Ii .. HeaterGas ExhaustFIG. 9.37HeatedWallsil,,,llllTiCI 4 + NH 3 =4TiN(s) + 3HCI + 1/2 CL2TiNi silicon wa,.~.[[HeaterGasIExhaustSchematic representation of the deposition of TiN using PVD and CVD methods.PVD MATERIALS AND PROCESSESFIG.
9.38341Comparison of PVD and CVD metal deposition for microelectronic applications.operating pressure (0.5-5 mTorr). By contrast, CVD requires a muchcruder vacuum, with operating pressure in the Torr range (e.g., pressuresfor CVD W are ~ 40 Torr). This allows CVD to make use of less costly,less complex vacuum pumping (e.g., cryopumps and cyropump regeneration cycles are avoided) and to avoid the need for separately injected backside gas to control wafer temperature transfer (see Section 5.3.4). Higheroperating pressure also allows a simple vacuum chuck to be used in somecases in which the pressure behind the wafer is controlled by active pumping and kept enough below the operating pressure to provide a suitablepressure gradient, i.e., a suitable holding force per unit area.
This avoidsthe need for a more costly, complex electrostatic chuck. On the other hand,the purity and electrical conductivity of CVD films are often compromisedby the relatively poor vacuum ambient and by incorporation of impuritiessuch as C and O that are common in organometallic precursors.With regard to wafer temperature, the CVD process is often exponentially activated (deposition rate goes as e -E~kx) so that uniform film thickness requires excellent uniformity of wafer temperature.
On the otherhand, the deposition rate of a PVD film is relatively insensitive to temperature (as is the sputter yield of the target); however, wafer temperature can342R. POWELL AND S. M. ROSSNAGELhave a strong influence on step coverage, film purity, and microstructure.Hence, global control of wafer temperature can be equally important inPVD.Finally, we mention the issue of chamber coatings that are common toboth technologies.
Even in a well-engineered PVD chamber, a majority ofthe sputtered flux from the target intercepts and adheres to the sputtershields and other chamber fixtures (e.g., collimator). The goal therefore isnot so much to prevent PVD films on these structures as to guarantee thatthe films do not cause particles or flake off. Therefore, promoting film adhesion and reducing film stress are important concerns, and conditions arechosen so that shields and other coated surfaces can last 50% or more oftarget life before replacement or cleaning is required. In CVD, on the otherhand, line-of-sight deposition is not relevant. In this case, the goal is toprevent chemical gases from condensing or reacting on surfaces or fromreacting prematurely in the showerhead with another precursor gas.
Bothchamber walls and showerheads are generally kept at an appropriate temperature with this goal in mind. Inevitably, some deposition occurs, necessitating the periodic use of in-situ reactive plasma or reactive gas cleaning.By contrast, in-situ cleaning of PVD chambers is rarely done.It is not the purpose here to review CVD metallization, but simply topoint out where CVD is likely to replace and/or augment PVD in microelectronic applications.
The basic technical issue relates to the differencebetween the "directional" nature of PVD and the surface-activated filmgrowth of low-pressure CVD (see Fig. 9.39). In conventional PVD, thecombined effect of the broad angular distribution of sputtered flux, finitetarget size, and gas-phase scattering gives rise to a large fraction of lowangle material, leading in turn to low bottom and sidewall coverage andconcerns about keyhole voids.
Hence, this situation is not optimum for lining or filling high aspect ratio features. Although coverage would be improved if the sticking coefficient of the metal adatoms were very low, thisis typically not the case for the metals and process conditions used in PVD.The use of collimation and/or lower pressure can improve directionality,but even at very low pressures ( < 0.1 mTorr) and strong collimation, theangular spread of incident flux can be rather broad (e.g., F W H M ~ ___ 20 ~for PVD Ti with a 1.5:1 aspect ratio collimator). If a highly anisotropicmethod such as RF-ionized PVD is used, the bottom coverage can be quitegood (e.g., > 80% in AR = 5:1 holes), and ideally one could fill the holefrom the bottom up or increase incident metal ion energy to resputter material from the bottom onto the sidewalls for a liner application (seeChapter 8). However, bottom-up filling requires the removal of the material deposited on the field by use of a subsequent etchback step.
Also, get-PVD MATERIALS AND PROCESSESFIG. 9.39343Representation of film coverage by CVD and PVD with varying degrees of directionality.ting a liner with high step coverage in a high aspect ratio hole (height h andwidth w with h/w >> 1) is problematic because the cylindrical plug of material entering the via hole (cross-sectional area A = 7rw2/4) must be redistributed over the much higher, interior surface area of the hole (A =,rrw2/4 x [ 1 + 4h/w]). A simple calculation based on conservation of mass343R. POWELL AND S .
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
