CPM2A_PROGRAMMING MANUAL (W353-E1-2) (986750), страница 94
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It is cleared at thebeginning, and not at the end, of operation.Page509The units can be any of the following, depending on the setting of in DM 6618.Default: 0.1 ms; “10 ms” setting: 0.1 ms; “100 ms” setting: 1 ms; “1 s” setting: 10 msCurrent Cycle Time (4 digits BCD) (See note 1.)The most recent cycle time during operation is stored. The Current Cycle Time is notcleared when operation stops.The units can be any of the following, depending on the setting of in DM 6618.Default: 0.1 ms; “10 ms” setting: 0.1 ms; “100 ms” setting: 1 ms; “1 s” setting: 10 msNote 1.
The units will be as follows, depending on the unit setting for the cycle monitor time (DM 6618):Initial status:0.1-ms unitWhen 10-ms unit is set:0.1-ms unitWhen 100-ms unit is set:1-ms unitWhen 1-s unit is set:10-ms unit2. Areas that cannot be used are cleared when the power is turned on.3. The contents of AR 10 is backed up by the built-in capacitor. If power is left OFF for longer than the backup time, however, the contents may be cleared.
For details regarding the backup time, refer to theCPM1A or CPM1 Operation Manual.CPM2A/CPM2C Memory AreasMemory Area StructureThe following memory areas can be used with the CPM2A/CPM2C.Data areaIR area1 Input areaOutput areaWork areaSR areaIR 000 to IR 009(10 words)IR 010 to IR 019(10 words)IR 020 to IR 049IR 200 to IR 227(58 words)BitsIR 00000 to IR 00915(160 bits)IR 01000 to IR 01915(160 bits)IR 02000 to IR 04915IR 20000 to IR 22715(928 bits)SR 228 to SR 255(28 words)---TR areaHR area2AR area2LR area1Timer/Counter area2DM area Read/write2SR 22800 to SR 25515(448 bits)TR 0 to TR 7(8 bits)HR 00 to HR 19HR 0000 to HR 1915(20 words)(320 bits)AR 00 to AR 23AR 0000 to AR 2315(24 words)(384 bits)LR 00 to LR 15LR 0000 to LR 1515(16 words)(256 bits)TC 000 to TC 255 (timer/counter numbers)3DM 0000 to DM 1999 --DM 2022 to DM 2047(2,026 words)Error log2DM 2000 to DM 2021 --(22 words)Read-only4DM 6144 to DM 6599 --(456 words)DM 6600 to DM 6655 --(56 words)PC Setup4546WordsFunctionThese bits can be allocated to the externalI/O terminals.Work bits can be freely used within the program.These bits serve specific functions such asflags and control bits.These bits are used to temporarily storeON/OFF status at program branches.These bits store data and retain their ON/OFF status when power is turned off.These bits serve specific functions such asflags and control bits.Used for a 1:1 data link with another PC.The same numbers are used for both timersand counters.DM area data can be accessed in wordunits only.
Word values are retained whenthe power is turned off.Used to store the error code of errors thatoccur. These words can be used as ordinary read/write DM when the error log function isn’t being used.Cannot be overwritten from program.Used to store various parameters that control PC operation.Appendix CMemory AreasNote 1. IR and LR words that are not used for their allocated functions can be used as work words.2.
The contents of the HR area, AR area, Counter area, and read/write DM area are backed up by the CPUUnit’s battery. If the battery is removed or fails, the data in these areas will be lost and reset to defaultvalues. (In CPM2C CPU Units without a battery, these areas are backed up by a capacitor. At 25C, thecapacitor will back up memory for 10 days.)3. When a TC number is used as a word operand, it accesses the timer or counter’s PV; when used as a bitoperand, it accesses the Completion Flag.4. Data in DM 6144 to DM 6655 cannot be overwritten from the program, but they can be changed from aProgramming Device. The program and data in DM 6144 to DM 6655 are backed up in flash memory.SR AreaThese bits mainly serve as flags related to CPM2A/CPM2C operation or contain present and set values for variousfunctions.
The functions of the SR area are explained in the following table.Note “Read-only” words and bits can be read as status in controller PC operation, but they cannot be written fromthe ladder program. Bits and words that are “Not used” are also read-only.Word(s)Bit(s)FunctionRead/writeReadPulse Output PV 0Contains the pulse output PV (–16,777,215 to 16,777,215). SR 22915 acts as onlythe sign bit; a negative number is indicated when SR 22915 is ON.(The same PV data can be read immediately with PRV(62).)SR 228,SR 22900 to 15SR 230,SR 23100 to 15SR 232toSR 23500 to 15SR 236toSR 23900 to 15Macro Function Output AreaContains the output operands for MCRO(99).(Can be used as work bits when MCRO(99) is not used.)SR 24000 to 15Interrupt Input 00003 Counter Mode SVSV when interrupt input 00003 is used in counter mode (4 digits hexadecimal).(Can be used as work bits when interrupt input 00003 is not used in countermode.)SR 24100 to 15Interrupt Input 00004 Counter Mode SVSV when interrupt input 00004 is used in counter mode (4 digits hexadecimal).(Can be used as work bits when interrupt input 00004 is not used in countermode.)SR 24200 to 15Interrupt Input 00005 Counter Mode SVSV when interrupt input 00005 is used in counter mode (4 digits hexadecimal).(Can be used as work bits when interrupt input 00005 is not used in countermode.)SR 24300 to 15Interrupt Input 00006 Counter Mode SVSV when interrupt input 00006 is used in counter mode (4 digits hexadecimal).(Can be used as work bits when interrupt input 00006 is not used in countermode.)Only Pulse Output PV 0 is used for ACC(––).Pulse Output PV 1Contains the pulse output PV (–16,777,215 to 16,777,215).
SR 23115 acts asthe sign bit; a negative number is indicated when SR 23115 is ON.(The same PV data can be read immediately with PRV(62).)Macro Function Input AreaContains the input operands for MCRO(99).(Can be used as work bits when MCRO(99) is not used.)Read/writePage9814565(Input 00006 does not exist in CPM2C CPU Units with 10 I/O points.)547Appendix CMemory AreasWord(s)Bit(s)FunctionSR 24400 to 15Interrupt Input 00003 Counter Mode PVCounter PV when interrupt input 00003 is used in counter mode (4 digits hexadecimal).SR 24500 to 15Interrupt Input 00004 Counter Mode PVCounter PV when interrupt input 00004 is used in counter mode (4 digits hexadecimal).SR 24600 to 15Interrupt Input 00005 Counter Mode PVCounter PV when interrupt input 00005 is used in counter mode (4 digits hexadecimal).SR 24700 to 15Interrupt Input 00006 Counter Mode PVCounter PV when interrupt input 00006 is used in counter mode (4 digits hexadecimal).SR 248,SR 249SR 25000 to 15SR 25100 to 15SR 25200Read/writeReadonlyPage67(Input 00006 does not exist in CPM2C CPU Units with 10 I/O points.)00 to 1501 to 03040506, 0708Not used.Pulse Output 0 PV Reset BitTurn ON to clear the PV of pulse output 0.Pulse Output 1 PV Reset BitTurn ON to clear the PV of pulse output 1.Not used.Peripheral Port Reset BitTurn ON to reset the peripheral port.
Automatically turns OFF when reset iscomplete.52138Read/write44Read/write89Read/write---09RS-232C Port Reset BitTurn ON to reset the RS-232C port. Automatically turns OFF when reset iscomplete.---10PC Setup Reset BitTurn ON to initialize PC Setup (DM 6600 through DM 6655). Automaticallyturns OFF again when reset is complete. Only effective if the PC is in PROGRAM mode.Forced Status Hold Bit (See note.)OFF: The forced status of bits that are forced set/reset is cleared whenswitching between PROGRAM mode and MONITOR mode.ON: The status of bits that are forced set/reset are maintained when switching between PROGRAM mode and MONITOR mode.The PC Setup can be set to maintain the status of this bit when the PC isturned off.212I/O Hold Bit (See note.)OFF: IR and LR bits are reset when starting or stopping operation.ON: IR and LR bit status is maintained when starting or stopping operation.The PC Setup can be set to maintain the status of this bit when the PC isturned off.171314Not used.Error Log Reset BitTurn ON to clear error log.
Automatically turns OFF again when operation iscomplete.15Not used.11548High-speed Counter PV Area(Can be used as work bits when the high-speed counter is not used.)Analog Setting 0 (CPM2A PCs only)Used to store the 4-digit BCD set value (0000 to 0200) from analog control 0.Analog Setting 1 (CPM2A PCs only)Used to store the 4-digit BCD set value (0000 to 0200) from analog control 1.High-speed Counter Reset Bit17Read/write527Appendix CMemory AreasWord(s)SR 253Bit(s)Function00 to 07FAL Error CodeThe error code (a 2-digit number) is stored here when an error occurs. TheFAL number is stored here when FAL(06) or FALS(07) is executed.
This wordis reset (to 00) by executing a FAL 00 instruction or by clearing the error froma Programming Device.08Battery Error FlagTurns ON when the CPU Unit backup battery’s voltage is too low.Cycle Time Overrun FlagTurns ON when a cycle time overrun occurs (i.e., when the cycle time exceeds 100 ms).0910,1112131415SR 2540001020304050607SR 25508 to 15000102030405060708 to 15Not used.Changing RS-232C Setup FlagTurns ON when the RS-232C port’s settings are being changed.Always ON FlagAlways OFF FlagFirst Cycle FlagTurns ON for 1 cycle at the start of operation.1-minute clock pulse (30 seconds ON; 30 seconds OFF)0.02-second clock pulse (0.01 second ON; 0.01 second OFF)Negative (N) FlagNot used.Overflow (OF) FlagTurns ON when an overflow occurs in a signed binary calculation.Underflow (UF) FlagTurns ON when an underflow occurs in a signed binary calculation.Differential Monitor Complete FlagTurns ON when differential monitoring is completed.STEP(08) Execution FlagTurns ON for 1 cycle only at the start of process based on STEP(08).Not used.0.1-second clock pulse (0.05 second ON; 0.05 second OFF)0.2-second clock pulse (0.1 second ON; 0.1 second OFF)1.0-second clock pulse (0.5 second ON; 0.5 second OFF)Instruction Execution Error (ER) FlagTurns ON when an error occurs during execution of an instruction.Carry (CY) FlagTurns ON when there is a carry in the results of an instruction execution.Greater Than (GR) FlagTurns ON when the result of a comparison operation is “greater.”Equals (EQ) FlagTurns ON when the result of a comparison operation is “equal,” or when theresult of an instruction execution is 0.Less Than (LE) FlagTurns ON when the result of a comparison operation is “less.”Not used.Read/writeReadonlyPage355-----Read/writeReadonly---------------Readonly----147356Readonly------------------Note DM 6601 in the PC Setup can be set to maintain the previous status of the Forced Status Hold Bit(SR 25211) and the I/O Hold Bit (SR 25212) when power is turned OFF.
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