CPM2A_PROGRAMMING MANUAL (W353-E1-2) (986750), страница 52
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This will generallymean that, when there might be a choice, OR LOAD will be coded before ANDLOAD.315SectionBasic Ladder Diagrams6-3The following diagram must be broken down into two blocks and each of thesethen broken into two blocks before it can be coded. As shown below, blocks aand b require an AND LOAD. Before AND LOAD can be used, however, ORLOAD must be used to combine the top and bottom blocks on both sides, i.e., tocombine a1 and a2; b1 and b2.Blockb1Blocka100000 0000100004 000052000300002 0000300006 00007Blocka2Blockb2BlockaBlockbAddressInstruction000000000100002000030000400005000060000700008000090001000011LDAND NOTLD NOTANDOR LDLDANDLDANDOR LDAND LDOUTOperands00000000010000200003—00004000050000600007——20003Blocks a1 and a2Blocks b1 and b2Blocks a and bThe following type of diagram can be coded easily if each block is coded in order:first top to bottom and then left to right.
In the following diagram, blocks a and bwould be combined using AND LOAD as shown above, and then block c wouldbe coded and a second AND LOAD would be used to combined it with the execution condition from the first AND LOAD. Then block d would be coded, a thirdAND LOAD would be used to combine the execution condition from block d withthe execution condition from the second AND LOAD, and so on through to blockn.20000Blocka316BlockbBlockcBlocknSectionBasic Ladder Diagrams6-3The following diagram requires an OR LOAD followed by an AND LOAD to codethe top of the three blocks, and then two more OR LOADs to complete the mnemonic code.0000000001AddressInstruction00000000010000200003000040000500006000070000800009000100001100012LDLDLDAND NOTOR LDAND LDLD NOTANDOR LDLD NOTANDOR LDOUTOperandsLR 0000000020000400005000060000700003LR00000000010000200003--0000400005-0000600007-0000Although the program will execute as written, this diagram could be drawn asshown below to eliminate the need for the first OR LOAD and the AND LOAD,simplifying the program and saving memory space.000020000300000LR 00000000100004000050000600007AddressInstruction0000000001000020000300004000050000600007000080000900010LDAND NOTORANDLD NOTANDOR LDLD NOTANDOR LDOUTOperandsLR000020000300001000000000400005-0000600007-0000The following diagram requires five blocks, which here are coded in order beforeusing OR LOAD and AND LOAD to combine them starting from the last twoblocks and working backward.
The OR LOAD at program address 00008 combines blocks d and e, the following AND LOAD combines the resulting executioncondition with that of block c, etc.000000000100002LR 0000Block bBlock aBlock c0000300004Block d000050000600007Blocks d and eBlock eBlock c with result of aboveBlock b with result of aboveBlock a with result of aboveAddressInstruction00000000010000200003000040000500006000070000800009000100001100012LDLDANDLDANDLDLDANDOR LDAND LDOR LDAND LDOUTOperandsLR0000000001000020000300004000050000600007----0000317SectionBasic Ladder Diagrams6-3Again, this diagram can be redrawn as follows to simplify program structure andcoding and to save memory space.0000600007000030000400000AddressLR 000000000000010000200003000040000500006000070000800009000050000100002InstructionOperandsLDANDORANDANDLDANDOR LDANDOUT00006000070000500003000040000100002-000000000LRThe next and final example may at first appear very complicated but can becoded using only two logic block instructions.
The diagram appears as follows:Block a0000000001010000100100002000030000400005200000000620000Block bBlock cThe first logic block instruction is used to combine the execution conditions resulting from blocks a and b, and the second one is to combine the executioncondition of block c with the execution condition resulting from the normallyclosed condition assigned IR 00003. The rest of the diagram can be coded withOR, AND, and AND NOT instructions.
The logical flow for this and the resultingcode are shown below.Block aBlock b00000000010100001001LDAND0000000001LDAND0100001001OR LDBlock c20000000050000400005OR20000LDAND000020000300006AND00002AND NOT 00003ORAND LD200003180000400006AddressInstruction00000000010000200003000040000500006000070000800009000100001100012LDANDLDANDOR LDORANDAND NOTLDANDORAND LDOUTOperands00000000010100001001-200000000200003000040000500006-20000SectionBasic Ladder Diagrams6-3-76-3Coding Multiple Right-hand InstructionsIf there is more than one right-hand instruction executed with the same execution condition, they are coded consecutively following the last condition on theinstruction line. In the following example, the last instruction line contains onemore condition that corresponds to an AND with IR 00004.0000000003HR 00010000120000000020000420001HR 00006-3-8Address000000000100002000030000400005000060000700008InstructionLDORORORANDOUTOUTANDOUTOperandsHRHR0000000001000020000000030001200000000420001Branching Instruction LinesWhen an instruction line branches into two or more lines, it is sometimes necessary to use either interlocks or TR bits to maintain the execution condition thatexisted at a branching point.
This is because instruction lines are executedacross to a right-hand instruction before returning to the branching point toexecute instructions one a branch line. If a condition exists on any of the instruction lines after the branching point, the execution condition could change duringthis time making proper execution impossible. The following diagrams illustratethis. In both diagrams, instruction 1 is executed before returning to the branchingpoint and moving on to the branch line leading to instruction 2.00000BranchingpointAddressInstructionInstruction 200000000010000200003LDInstruction 1ANDInstruction 2Instruction 1AddressInstruction0000000001000020000300004LDANDInstruction 1ANDInstruction 2Instruction 100002Diagram A: Correct Operation00000BranchingpointOperands00000000020000100002Instruction 2Diagram B: Incorrect OperationOperands000000000100002If, as shown in diagram A, the execution condition that existed at the branchingpoint cannot be changed before returning to the branch line (instructions at thefar right do not change the execution condition), then the branch line will beexecuted correctly and no special programming measure is required.If, as shown in diagram B, a condition exists between the branching point and thelast instruction on the top instruction line, the execution condition at the branching point and the execution condition after completing the top instruction line willsometimes be different, making it impossible to ensure correct execution of thebranch line.There are two means of programming branching programs to preserve theexecution condition.
One is to use TR bits; the other, to use interlocks(IL(02)/IL(03)).319SectionBasic Ladder Diagrams6-3The TR area provides eight bits, TR 0 through TR 7, that can be used to temporarily preserve execution conditions. If a TR bit is placed at a branching point, thecurrent execution condition will be stored at the designated TR bit. When returning to the branching point, the TR bit restores the execution status that wassaved when the branching point was first reached in program execution.TR BitsThe previous diagram B can be written as shown below to ensure correct execution.
In mnemonic code, the execution condition is stored at the branching pointusing the TR bit as the operand of the OUTPUT instruction. This executioncondition is then restored after executing the right-hand instruction by using thesame TR bit as the operand of a LOAD instructionTR 0Address0000100000Instruction 100002Instruction 2Diagram B: Corrected Using a TR bit00000000010000200003000040000500006InstructionOperandsLDOUTANDInstruction 1LDANDInstruction 200000000001TRTR000002In terms of actual instructions the above diagram would be as follows: The statusof IR 00000 is loaded (a LOAD instruction) to establish the initial executioncondition.
This execution condition is then output using an OUTPUT instructionto TR 0 to store the execution condition at the branching point. The executioncondition is then ANDed with the status of IR 00001 and instruction 1 is executedaccordingly. The execution condition that was stored at the branching point isthen re-loaded (a LOAD instruction with TR 0 as the operand), this is ANDed withthe status of IR 00002, and instruction 2 is executed accordingly.The following example shows an application using two TR bits.TR 000000AddressTR 10000100002Instruction 100003Instruction 200004Instruction 300005Instruction 4000000000100002000030000400005000060000700008000090001000011000120001300014InstructionLDOUTANDOUTANDInstruction 1LDANDInstruction 2LDANDInstruction 3LDAND NOTInstruction 4OperandsTRTR00000000001100002TR100003TR000004TR000005In this example, TR 0 and TR 1 are used to store the execution conditions at thebranching points.
After executing instruction 1, the execution condition stored inTR 1 is loaded for an AND with the status IR 00003. The execution conditionstored in TR 0 is loaded twice, the first time for an AND with the status of IR00004 and the second time for an AND with the inverse of the status of IR 00005.320SectionBasic Ladder Diagrams6-3TR bits can be used as many times as required as long as the same TR bit is notused more than once in the same instruction block. Here, a new instruction blockis begun each time execution returns to the bus bar.
If, in a single instructionblock, it is necessary to have more than eight branching points that require theexecution condition be saved, interlocks (which are described next) must beused.When drawing a ladder diagram, be careful not to use TR bits unless necessary.Often the number of instructions required for a program can be reduced andease of understanding a program increased by redrawing a diagram that wouldotherwise required TR bits. In both of the following pairs of diagrams, the bottomversions require fewer instructions and do not require TR bits. In the first example, this is achieved by reorganizing the parts of the instruction block: the bottomone, by separating the second OUTPUT instruction and using another LOADinstruction to create the proper execution condition for it.Note Although simplifying programs is always a concern, the order of execution ofinstructions is sometimes important.
For example, a MOVE instruction may berequired before the execution of a BINARY ADD instruction to place the properdata in the required operand word. Be sure that you have considered executionorder before reorganizing a program to simplify it.TR 000000000000000100003Instruction 1Instruction 1Instruction 2TR 0000010000200004Instruction 200000Instruction 200001Instruction 1000010000200003Instruction 1000000000100004Instruction 2Note TR bits are must be input by the user only when programming using mnemoniccode.
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