ATmega128 (961723), страница 62
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Enter EEPROM Write0100011_00010001xxxxxxx_xxxxxxxx4b. Load Address High Byte0000111_aaaaaaaaxxxxxxx_xxxxxxxx4c. Load Address Low Byte0000011_bbbbbbbbxxxxxxx_xxxxxxxx4d. Load Data Byte0010011_iiiiiiiixxxxxxx_xxxxxxxx4e. Latch Data0110111_000000001110111_000000000110111_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxx(1)4f. Write EEPROM Page0110011_000000000110001_000000000110011_000000000110011_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxx(1)4g.
Poll for Page Write complete0110011_00000000xxxxxox_xxxxxxxx(2)5a. Enter EEPROM Read0100011_00000011xxxxxxx_xxxxxxxx5b. Load Address High Byte0000111_aaaaaaaaxxxxxxx_xxxxxxxx(2)(9)(9)low bytehigh byte(9)(9)3132467M–AVR–11/04Table 130. JTAG Programming Instruction (Continued)Set (Continued) a = address high bits, b = address low bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in, x = don’t careInstructionTDI sequenceTDO sequence5c. Load Address Low Byte0000011_bbbbbbbbxxxxxxx_xxxxxxxx5d. Read Data Byte0110011_bbbbbbbb0110010_000000000110011_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_oooooooo0100011_01000000xxxxxxx_xxxxxxxx6b. Load Data Low Byte0010011_iiiiiiiixxxxxxx_xxxxxxxx(3)6c. Write Fuse Extended byte0111011_000000000111001_000000000111011_000000000111011_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxx(1)6d.
Poll for Fuse Write complete0110111_00000000xxxxxox_xxxxxxxx(2)6e. Load Data Low Byte(7)0010011_iiiiiiiixxxxxxx_xxxxxxxx(3)6f. Write Fuse High byte0110111_000000000110101_000000000110111_000000000110111_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxx(1)6g. Poll for Fuse Write complete0110111_00000000xxxxxox_xxxxxxxx(2)6h. Load Data Low Byte0010011_iiiiiiiixxxxxxx_xxxxxxxx(3)6i. Write Fuse Low byte0110011_000000000110001_000000000110011_000000000110011_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxx(1)6j. Poll for Fuse Write complete0110011_00000000xxxxxox_xxxxxxxx(2)7a. Enter Lock bit Write0100011_00100000xxxxxxx_xxxxxxxx7b. Load Data Byte0010011_11iiiiiixxxxxxx_xxxxxxxx(4)7c. Write Lock bits0110011_000000000110001_000000000110011_000000000110011_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxx(1)7d.
Poll for Lock bit Write complete0110011_00000000xxxxxox_xxxxxxxx(2)8a. Enter Fuse/Lock bit Read0100011_00000100xxxxxxx_xxxxxxxx8b. Read Extended Fuse Byte(6)0111010_000000000111011_00000000xxxxxxx_xxxxxxxxxxxxxxx_oooooooo8c. Read Fuse High Byte(7)0111110_000000000111111_00000000xxxxxxx_xxxxxxxxxxxxxxx_oooooooo8d. Read Fuse Low Byte(8)0110010_000000000110011_00000000xxxxxxx_xxxxxxxxxxxxxxx_oooooooo8e. Read Lock bits(9)0110110_000000000110111_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxoooooo6a. Enter Fuse Write(6)(7)(9)314Notes(5)ATmega1282467M–AVR–11/04ATmega128Table 130. JTAG Programming Instruction (Continued)Set (Continued) a = address high bits, b = address low bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in, x = don’t careInstructionTDI sequenceTDO sequenceNotes8f.
Read Fuses and Lock bits0111010_000000000111110_000000000110010_000000000110110_000000000110111_00000000xxxxxxx_xxxxxxxxxxxxxxx_ooooooooxxxxxxx_ooooooooxxxxxxx_ooooooooxxxxxxx_oooooooo(5)fuse ext. bytefuse high bytefuse low bytelock bits9a. Enter Signature Byte Read0100011_00001000xxxxxxx_xxxxxxxx9b. Load Address Byte0000011_bbbbbbbbxxxxxxx_xxxxxxxx9c. Read Signature Byte0110010_000000000110011_00000000xxxxxxx_xxxxxxxxxxxxxxx_oooooooo10a.
Enter Calibration Byte Read0100011_00001000xxxxxxx_xxxxxxxx10b. Load Address Byte0000011_bbbbbbbbxxxxxxx_xxxxxxxx10c. Read Calibration Byte0110110_000000000110111_00000000xxxxxxx_xxxxxxxxxxxxxxx_oooooooo11a. Load No Operation Command0100011_000000000110011_00000000xxxxxxx_xxxxxxxxxxxxxxx_xxxxxxxxNotes:1. This command sequence is not required if the seven MSB are correctly set by the previous command sequence (which isnormally the case).2. Repeat until o = “1”.3. Set bits to “0” to program the corresponding fuse, “1” to unprogram the Fuse.4. Set bits to “0” to program the corresponding lock bit, “1” to leave the Lock bit unchanged.5. “0” = programmed, “1” = unprogrammed.6. The bit mapping for Fuses Extended byte is listed in Table 117 on page 2897.
The bit mapping for Fuses High byte is listed in Table 118 on page 2908. The bit mapping for Fuses Low byte is listed in Table 119 on page 2909. The bit mapping for Lock bits byte is listed in Table 115 on page 28810. Address bits exceeding PCMSB and EEAMSB (Table 123 and Table 124) are don’t care3152467M–AVR–11/04Figure 149. State Machine Sequence for Changing/Reading the Data Word1Test-Logic-Reset00Run-Test/Idle1Select-DR Scan1Select-IR Scan0011Capture-DRCapture-IR000Shift-DR11Exit1-DR00Pause-DR10Exit2-DRExit2-IR11Update-DR3160Pause-IR1Virtual Flash Page LoadRegister1Exit1-IR010Shift-IR101Update-IR010The Virtual Flash Page Load Register is a virtual scan chain with length equal to thenumber of bits in one Flash page.
Internally the Shift Register is 8-bit, and the data areautomatically transferred to the Flash page buffer byte by byte. Shift in all instructionwords in the page, starting with the LSB of the first instruction in the page and endingwith the MSB of the last instruction in the page. This provides an efficient way to load theentire Flash page buffer before executing Page Write.ATmega1282467M–AVR–11/04ATmega128Figure 150. Virtual Flash Page Load RegisterSTROBESTDIStatemachineADDRESSFlashEEPROMFusesLock BitsDATATDOVirtual Flash Page ReadRegisterThe Virtual Flash Page Read Register is a virtual scan chain with length equal to thenumber of bits in one Flash page plus 8.
Internally the Shift Register is 8-bit, and thedata are automatically transferred from the Flash data page byte by byte. The first eightcycles are used to transfer the first byte to the internal Shift Register, and the bits thatare shifted out during these 8 cycles should be ignored. Following this initialization, dataare shifted out starting with the LSB of the first instruction in the page and ending withthe MSB of the last instruction in the page.
This provides an efficient way to read one fullFlash page to verify programming.Figure 151. Virtual Flash Page Read RegisterSTROBESTDIStatemachineADDRESSFlashEEPROMFusesLock BitsDATATDOProgramming AlgorithmAll references below of type “1a”, “1b”, and so on, refer to Table 130.3172467M–AVR–11/04Entering Programming Mode1. Enter JTAG instruction AVR_RESET and shift 1 in the Reset Register.2.
Enter instruction PROG_ENABLE and shift 1010_0011_0111_0000 in the Programming Enable Register.Leaving Programming Mode1. Enter JTAG instruction PROG_COMMANDS.2. Disable all programming instructions by using no operation instruction 11a.3. Enter instruction PROG_ENABLE and shift 0000_0000_0000_0000 in the programming Enable Register.4.
Enter JTAG instruction AVR_RESET and shift 0 in the Reset Register.Performing Chip Erase1. Enter JTAG instruction PROG_COMMANDS.2. Start chip erase using programming instruction 1a.3. Poll for chip erase complete using programming instruction 1b, or wait fortWLRH_CE (refer to Table Note: on page 302).Programming the FlashBefore programming the Flash a Chip Erase must be performed. See “Performing ChipErase” on page 318.1. Enter JTAG instruction PROG_COMMANDS.2. Enable Flash write using programming instruction 2a.3.
Load address high byte using programming instruction 2b.4. Load address low byte using programming instruction 2c.5. Load data using programming instructions 2d, 2e and 2f.6. Repeat steps 4 and 5 for all instruction words in the page.7. Write the page using programming instruction 2g.8. Poll for Flash write complete using programming instruction 2h, or wait for tWLRH(refer to Table Note: on page 302).9.
Repeat steps 3 to 7 until all data have been programmed.A more efficient data transfer can be achieved using the PROG_PAGELOADinstruction:1. Enter JTAG instruction PROG_COMMANDS.2. Enable Flash write using programming instruction 2a.3. Load the page address using programming instructions 2b and 2c. PCWORD(refer to Table 123 on page 293) is used to address within one page and must bewritten as 0.4. Enter JTAG instruction PROG_PAGELOAD.5. Load the entire page by shifting in all instruction words in the page, starting withthe LSB of the first instruction in the page and ending with the MSB of the lastinstruction in the page.6.
Enter JTAG instruction PROG_COMMANDS.7. Write the page using programming instruction 2g.8. Poll for Flash write complete using programming instruction 2h, or wait for tWLRH(refer to Table Note: on page 302).9. Repeat steps 3 to 8 until all data have been programmed.318ATmega1282467M–AVR–11/04ATmega128Reading the Flash1. Enter JTAG instruction PROG_COMMANDS.2.
Enable Flash read using programming instruction 3a.3. Load address using programming instructions 3b and 3c.4. Read data using programming instruction 3d.5. Repeat steps 3 and 4 until all data have been read.A more efficient data transfer can be achieved using the PROG_PAGEREADinstruction:1. Enter JTAG instruction PROG_COMMANDS.2. Enable Flash read using programming instruction 3a.3. Load the page address using programming instructions 3b and 3c. PCWORD(refer to Table 123 on page 293) is used to address within one page and must bewritten as 0.4. Enter JTAG instruction PROG_PAGEREAD.5. Read the entire page by shifting out all instruction words in the page, startingwith the LSB of the first instruction in the page and ending with the MSB of thelast instruction in the page. Remember that the first 8 bits shifted out should beignored.6.
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