Roland A. - PVD for microelectronics (779636), страница 56
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Intrinsic film stress depends on a number of deposition and film parameters (e.g., deposition rate,temperature, ion bombardment during deposition, argon incorporation, andfilm thickness) and can usually be controlled by choosing appropriateprocess conditions. Thermal stress results when the film and substrate expand or contract at different rates during thermal cycling. For a blankettwo-dimensional film on a substrate, the thermal stress O'th is given byE{(Aa~)(AT)trth =(1-v)(9.1)w h e r e moffs = off - ofs is the difference between the coefficients of thermalexpansion (CTE) of the film and substrate, AT is the difference betweenthe deposition temperature and measurement temperature (i.e., room temperature), Ef is the Young's modulus of the film, and v is the Poisson'sratio. In general, the CTE of film and substrate are different. Hence, following PVD at elevated temperature, the film and substrate shrink by different amounts during c o o l i n g - resulting in a thermal stress.
If the CTEof the film is greater than the CTE of the substrate, then during cooling theconfining substrate will prevent the film from shrinking, leaving it undertension. If the CTE of the substrate is greater than that of the film, then thefilm will be pulled into compression.Due to the large difference in the linear thermal expansion coefficientbetween AI (of = 23.2 ppm per ~ = 23.2 • 10 -6 per ~and that of S i(a ~ 2.6 ppm per ~or SiO z (of -~ 4 ppm per ~the film and underlayer shrink dimensionally by quite different amounts as they cool fromthe elevated temperature of deposition down to room temperature. The result is that a thermally induced stress develops in the PVD A1 film. To estimate the magnitude of the stress, we assume that PVD AI was depositedon a Si wafer at 300~ (573 K) so that moffs ~ 23.2 ppm - 2.6 ppm =20.6 ppm and AT = 573 K - 293 K = 280 K.
Young's modulus for A1 is9 • 106 psi = 6.2 X 10 ~ dyne/cm 2, and Poisson's ratio is ~ 0.34.Therefore, using Eq. (9.1) we calculate that orth ~ (6.2 • 10 l~dynes/cm2)(20.6 x 10 -6 per K) (280 K)/(0.66) = 5.3 x 109 dynes/cm 2 =530 MPa. This tensile stress would then add to the intrinsic film stress,which, if it were compressive, would then serve to reduce the net stress inthe film.302R. POWELL AND S. M. ROSSNAGELStress is measured in megapascals (MPa) or dynes/cm 2, where 1 MPa = l 0 7dynes/cm2. By convention, values are written positive for tensile stress andnegative for compressive stress.One mechanism for relieving this stress is mass transport to the surface,which manifests itself as surface bumps or hillocks.
This topography caninduce interlayer short circuits and changes in metal reflectivity leading todifficulties with photolithography. The onset of hillock formation occursaround half the melting point in degrees Kelvin, which for AI is ~ 190~and unfortunately well within the typical PVD process window.
The use ofCu-containing A1 alloys, reduced process temperature, and PVD conditions that lead to small A1 grain size can all be exploited to minimizehillock formation.It is important to note that the thermal stress of an unpatterned, twodimensional PVD film on a substrate (Eq. (9.1)) does not accurately represent the thermal stress of a real metal line. This is because in multilevelmetallization, the metal films are embedded in dielectric layers and are either patterned into narrow lines or confined within three-dimensional contacts and vias. For example, simply confining an A1 line within an oxidecan double the stress that it would experience due to thermal cycling between room temperature and 400~ Also, a large stress concentration exists at the corners of lines and at interfaces, which is where one usually observes void formation.9.3.4CRYSTAL ORIENTATIONThe typical orientation of PVD A1 films deposited on Si or SiO 2 is predominantly (111) with a small amount of (200), which has important consequences for PVD.
In particular, it has been found that the mean-time-tofailure (MTTF) of an A1 line due to electromigration can be correlated witha microstructural parameter r/, which is a function of median grain size (s),standard deviation of grain size distribution (o9, and the peak intensities Iof the (111) and (200) reflections in the X-ray diffraction pattern. This parameter is given by [9.13]slog I~i11~(9.2)Large values of M T T F have been found to correlate with large values of r/,and therefore a PVD A1 interconnect film should have a narrow distribution of large grains with a strong (111) texture.PVD MATERIALS AND PROCESSES303A1 films are typically deposited over amorphous films such as the exposed oxide sidewalls in a via; however, they are also deposited ontofilms such as Ti and TiN that can have their own preferred crystal orientation.
These underlayers can in turn effect the resulting A1 orientation.Figure 9.13 shows data on the texture of PVD A1 films deposited ontothermal SiO 2 (a thermally oxidized Si wafer) or onto a PVD Ti film thathad been deposited onto the SiO 2 at temperatures in the range of 3 0 0 500~The Ti deposition temperature was found to influence its owncrystal orientation, being (002) at 300~ and becoming (1010) above400~ Figure 9.13 shows that the preferred orientation of the A1 was(111) in all cases, but the texture was much weaker when deposition wasdirectly on oxide. Surprisingly, the crystal orientation of the Ti underlayer had little effect on the texture of the A1 film, nor did the depositiontemperature of the A1 (100~ or 300~9.3.5INTERACTION OF A L WITH TIBoth AI and Ti are highly reactive metals and are often used in combination.
For example, a Ti wetting layer is used to promote the flow of AI inhigh-temperature applications such as reflow A1 and the cold-hot AIprocess (see Section 7.2). Therefore, the interaction of A1 and Ti needs to10.-.8-~ A I(/3@ 100~AI @ 300~"1:3ve".,..,6--1- 4-}_-- __-----[7v2-0-TNo Ti-"1Ti @300~ITi @400~[Ti@450~-]Ti@500~Underlayer and TemperatureFIG. 9.13overlayer.Crystal orientation of PVD A1 films deposited on bare SiO 2 and on SiO z with a PVD Ti304R. POWELL AND S. M. ROSSNAGELbe considered. When A1 and Ti are in contact at elevated temperature, theTi and A1 interdiffuse and react to form the intermetallic compound TiA13,or Ti aluminide, in a layer-by-layer fashion.
It has been found that thegrowth of the aluminide proceeds with a rate constant K = K 0e x p ( - E / k T ) , where E ~ 1.85 eV and K 0 -~ 0.15 cm2/sec [9.14]. The rateconstant is the same whether the Ti/AI is deposited on Si or SIO2; however,if an A1 alloy is used, the activation energy needs to be modified from the1.85 eV value for pure A1. For example, a value of E = 2.4 eV has beenfound for A1 alloys with 3 at % Cu, leading to a slower rate of growth[9.15]. In all cases, the thickness of the TiA13 formed after time t is givenby the expressiond = (Kt) 1/2 = (Kot)l/Zexp2kT(9.3)Using Eq.
(9.3), we estimate that in 1 minute at a temperature of 450~a TiAI 3 film of thickness d - 270 A will form. Given that Ti films used ininterconnect or barrier applications are on the order of I00/~ while the AIfilms are on the order of 10,000/~, we see that all of the Ti layer can bequickly consumed by the AI.
Since the resistivity of TiA13 ( ~ 2 0 / x l ) - c m )is many times greater than that of AI ( ~ 3/xl)-cm), the overall resistanceof the AI-Ti stack increases. On the other hand, the mechanical propertiesof the aluminide act to "harden" the slab interconnect against stress migration and electromigration in the overlying AI conductor, leading to useof sandwiched structures with the Ti deposited directly under the AI (e.g.,TiNFFi/AI/TiN) or above it (e.g., TiN/AI/Ti/TiN). In both cases, having anultraclean PVD chamber is desired to prevent oxidation of the AI-Ti interface that would poison TiAI 3 formation.Finally, we note that the AI-Ti reaction has been used with monitorwafers to measure the temperature and/or temperature uniformity ofheater tables used in PVD [9.16, 9.17].
In this case, the monitor wafermight be an oxidized Si wafer on which a relatively thick Ti film (e.g.,1000 A) and AI overlayer (e.g., 6000 ~ ) have been sputter deposited.Annealing of such a wafer in a calibrated furnace for different timesand/or temperatures would yield sheet resistance curves like those shownin Fig. 9.14. The layer-by-layer formation of high-resistivity TiAI 3 at theTi-AI interface consumes A1, and the thickness of the conducting A1 layermeasured by the sheet resistance probe decreases.
Since R s = p/t, a corresponding increase in sheet resistance is observed. Using this calibrationdata, the decrease in R s of a monitor wafer can then be used to compareone PVD heater against another (Fig. 9.15) or to assess the uniformity ofPVD MATERIALS AND PROCESSES650305-600A(.1ov5SO-oqkle~E500-umfi450-IlL400-350 -90.194,,6t~w[8,129,4,,6, , ,8i102,~";';'l100TilAI Resistance (m~/sq.)FIG. 9.14 Calibration curves of sheet resistance of an AI (6 k/~)-Ti(l k]k) bilayer on SiO 2 after furnace annealing at 128 sec (boxes) and 180 see (dots).a given heater table by mapping monitor wafer sheet resistance before andafter annealing on the table.9.3.6UNIFORMITY OF A L L O Y COMPOSITIONAlthough AI-Cu alloys typically contain only a small weight percentageof Cu (~ 0.5-1%), the distribution of Cu over the wafer surface can affect the uniformity of resistivity, electromigration performance, and interconnect line definition during plasma etching.
While the target may contain a uniform distribution of Cu, differences in the emission and transportproperties of the alloy constituents can give rise to compositional variations across the wafer [9.18, 9.19]. Figure 9.16 shows experimental andmeasured radial thickness profiles for elemental AI and Cu targets sputtered at 5 mTorr and 20 mTorr from a 5-cm-diameter magnetron with a6-cm source-to-substrate spacing [9.19].
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