Roland A. - PVD for microelectronics (779636), страница 25
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5.19).This greatly reduces the time for the module to reach base pressure afterpreventive maintenance (PM), which results in improved tool productivity.Figure 5.20 shows the time associated with a PM process, which consistsof venting a PVD chamber to atmosphere, changing sputter shields and target, and pumping down to the 10-9-Torr range base pressure. When thecryopump was augmented by in-situ NEG pumping, the chamber based outin 30 minutes.
On the other hand, 5 hours were required using a cryopump128R. POWELLAND S. M. ROSSNAGELFIG. 5.19 Nonevaporable getter (NEG) pumping package using high-surface-area disks of zirconium-alloy (InsiTorr T M fast pump module, courtesy of SAES Pure Gas, Inc., San Luis Obispo, CA).FIG. 5.20 Time associated with a preventive maintenance step, with and without NEG-assistedpumping in the high vacuum regime (after table 1 in ref.
5.17). Reprinted from the August 1996 edition of Solid State Technology (copyright 1996 by PennWell).SPUTTERING TOOLS129alone. Since pump-down time represents a significant fraction of totalmodule downtime, the net effect of using NEG technology was to reducetotal maintenance cycle time by 35%.Vacuum PracticesElementary vacuum theory gives the relation for the pressure P(t) of achamber of volume V being evacuated from an initial pressure P0 by apump of speed S asP(t)=(P~+ QS(5.1)where Q is the leakage of gas into the chamber, either intentional (e.g., Argas for PVD) or unintentional from outgassing and vacuum leaks. Eq. (5.1)shows that the base pressure (t = ~) is given by the ratio Q/S, so that reducing base pressure requires either increasing pump speed or reducingleaks and outgassing.
Increasing the vacuum conductance (C) of connecting tubing and orifices between pump and chamber (e.g., using a largediameter, close-coupled pump line) is desirable to bring the effective pumpspeed (Seff) as close to the theoretical m a x i m u m speed S as possible( I / S ff = I/C + l/S). However, using much larger pumps is not costeffective since the price of UHV pumps increases greatly with size (i.e.,pump speed). Therefore, great attention is paid in PVD cluster tools to theintegrity of vacuum flanges, welds, etc. and to surface preparation to reduce outgassing. Since the speed of cryopumps is usually S < 5000 l/sec,we estimate that leak-up rates Q < 5 x 1 0 - 7 Torr-l/sec are required toachieve Q/S = 1 0 - 9 Tort UHV base pressures (1 Torr-1/sec corresponds to79 sccm flow of gas at atmospheric pressure).
A similar order-ofmagnitude calculation shows why the use of UHV practices are desired forPVD. The gas throughput of Ar when sputtering at 5 mTorr is ~ 1 Torrl/sec. Also, it is known that partial pressures of water in Ar process gas assmall as ~ 1 ppb can adversely affect PVD A1 film properties. Therefore,taking the surface area of a PVD chamber as ~ 104 cm 2, we estimate that1 ppb of water will be introduced into the process gas by an outgassing rateof only 10-~3 Torr-1/sec per cm 2.Preparing surfaces to achieve this level of cleanliness in a PVD cluster tool requires great attention to such details as (1) surface finish ofchambers and fixtures (e.g., an electropolished or a mirror finish is preferred to reduce surface area), (2) materials of construction (e.g., stainless 316L is preferred over 304 to minimize hydrogen outgassing), (3)sealing surfaces (e.g., metal bonnet-sealed gate valves are preferred over130R.
POWELL AND S. M. ROSSNAGELmore gas-permeable elastomers), and (4) bakeout (e.g., internal bakeoutlamps can be used to outgas both chamber walls and sputter shields).High-vacuum and UHV design practices are discussed in a number oftexts and articles on vacuum technology to which the reader is referred(e. g., see re fs. 5.11-5.14).5.3.2W A F E R DEGASProper bakeout of chamber and shields is required to minimize outgassingof water vapor and other unwanted residual gases during PVD. Similarly,proper in-situ degas of oxide-patterned wafers is needed prior to both precleaning and PVD to prevent outgassing that could impede contact formation or give rise to "poisoned" vias with poor via chain resistance.
In extreme cases, A1 via plugs can actually be forced out of the via opening byoutgassing from below. While a combination of CVD oxide and spin-onglass (SOG) are used in interlevel dielectric stacks, the SOG is generallyof greater concern with respect to PVD degas since it is very porous on ananometer scale and prone to adsorption/desorption of relatively largeamounts of water. This water exists as adsorbed surface water on the glassand within its network of interconnected micropores, and in the form ofsilanol groups (Si-OH) in the bulk of the film.
Even though much of thiswater can be driven out of the film by a high-temperature furnace cureafter spin coating, the film can readily reabsorb moisture when left inhumid room air. For example, a cured 2000-/~ SOG film might absorb several weight percent of water during only a few minutes of storage or transport in humid air before being loaded into a PVD tool.Water evolved from the SOG during a subsequent precleaning or deposition step can then, if the partial pressure is great enough, lead to unwanted oxidization of a contact (SiO 2 formation) or via (e.g., A1203 formation) [5.19, 5.20].
Even though the SOG might be protectivelysandwiched between two CVD glass layers, the area of the SOG that is directly exposed on the sidewall of the contact or via provides a ready sourceof unwanted water vapor. Since the out-diffusion rate of water from SOGtends to increase greatly with temperature, the problem is most severe forelevated temperature steps.
Also, water vapor is readily dissociated in thesputtering plasma to form atomic H, and this hydrogen can accumulatealong the grain boundaries of many sputtered films, (e.g., for Ti-W alloys)increasing their intrinsic film stress.To deal with this problem, an in-situ vacuum anneal ( ~ 10 -5 Torr) isgiven to wafers prior to both precleaning and PVD deposition. The empir-SPUTTERING TOOLS131ical rule seems to be as follows: Degas the wafer for as long as possibleconsistent with high wafer throughput (typically ~ 60 sec) and at least50~ higher than the hottest process step. For example, if an A1 two-stepflow process (see Chapter 7) requires wafer temperature of 380~degas should be above 430~It is worth pointing out that althoughloosely bound surface H20 can be removed by a moderate vacuum bakeat ~ 200~ more tightly bound H20 in the bulk (e.g., hydrogen-bondedsilanol groups) may require outgassing temperatures of ~ 400~Extremely stable water, such as that associated with isolated silanol groupsin the bulk of the glass, may not be completely released until temperatures above 700~ are reached.
On the other hand, since PVD processtemperature rarely exceeds 500~such water is not likely to be mobileduring deposition and is not usually of concern.Regarding hardware for degas, lamp heating of wafers has been employed as well as hot plates with backside-gas-assisted heat transfer. Whilethe ramp-up time to degas temperature can be much less with lamps, consistent with high wafer throughput, this must be considered against theadded hardware complexity and cost.5.3.3 WAFER PRECLEANThe presence of interfacial contamination and oxides can inhibit desiredthin film solid state reactions and lead to repeatability problems.
For example, the presence of native silicon oxide at a contact before PVD Ti deposition can inhibit the Ti silicidation process and lead to increased and/orvariable contact resistance. This has led to the widespread use of precleaning, which refers to the in-situ removal of native oxides and possible dryetch residues (e.g., Teflon-like polymers) prior to PVD metal deposition(although in the case of contact metallization with Ti, the high-purity PVDTi also serves to clean the interface by reducing native silicon oxides).PVD precleaning is sometimes referred to as "etching," which whilestrictly true, can cause confusion since etching is also used to describe thewet chemical and dry plasma-assisted methods that are widely used forphotolithographic pattern transfer in IC fabrication. For example, plasmaetching of photoresist-patterned PVD A1Cu is used to define separate interconnect lines out of the blanket film.Precleaning is typically done using inert Ar + sputter etching (inert ionmilling) with ion energy of -~ 50-500 e V - in effect treating the waferas a sputter target.
This approach works because physical sputtering is akind of universal solvent, the sputter yield of most elements of interest in132R. POWELL AND S. M. ROSSNAGELmicroelectronics being greater than ~ 0.01 for ion energy above ~ 50 eV(see Chapter 2). Ion bombardment can also create dangling bonds that promote the adhesion of a subsequent sputtered overlayer.
On the other hand,unlike reactive ion etching (RIE) and other plasma-assisted methods usedfor pattern definition etching in microelectronics, the selectivity of physical sputtering is not particularly high. Since Si and SiO 2 sputter at similarrates, overetching when cleaning native SiO 2 at a Si contact will removethe Si as well. For the ion energies typically used in precleaning, the sputter yield of A1203 is approximately 5 times lower than SiO 2, making itmore time consuming to clean equivalent oxide thickness from the vialevel than at the contact.Another challenge for conventional sputter precleaning is removing unwanted oxides and contamination from the bottom of steep features without simultaneously sputtering the interlayer dielectric from the sidewallsonto the bottom.
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