ATmega8 (961722), страница 52
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for Sleep function)(see specific descr. for WDR/timer)NoneNoneNone111288ATmega8(L)2486O–AVR–10/04ATmega8(L)Ordering InformationSpeed (MHz)816Notes:Power Supply2.7 - 5.54.5 - 5.5Ordering CodePackage(1)ATmega8L-8ACATmega8L-8PCATmega8L-8MC32A28P332M1-ACommercial(0°C to 70°C)ATmega8L-8AIATmega8L-8AU(2)ATmega8L-8PIATmega8L-8PU(2)ATmega8L-8MIATmega8L-8MU(2)32A32A28P328P332M1-A32M1-AIndustrial(-40°C to 85°C)ATmega8-16ACATmega8-16PCATmega8-16MC32A28P332M1-ACommercial(0°C to 70°C)ATmega8-16AIATmega8-16AU(2)ATmega8-16PIATmega8-16PU(2)ATmega8-16MIATmega8-16MU(2)32A32A28P328P332M1-A32M1-AIndustrial(-40°C to 85°C)Operation Range1.
This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering informationand minimum quantities.2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green.Package Type32A32-lead, Thin (1.0 mm) Plastic Quad Flat Package (TQFP)28P328-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)32M1-A32-pad, 5 x 5 x 1.0 body, Lead Pitch 0.50 mm Micro Lead Frame Package (MLF)2892486O–AVR–10/04Packaging Information32APIN 1BPIN 1 IDENTIFIERE1eED1DC0˚~7˚A1A2ALCOMMON DIMENSIONS(Unit of Measure = mm)Notes:1.
This package conforms to JEDEC reference MS-026, Variation ABA.2. Dimensions D1 and E1 do not include mold protrusion. Allowableprotrusion is 0.25 mm per side. Dimensions D1 and E1 are maximumplastic body size dimensions including mold mismatch.3. Lead coplanarity is 0.10 mm maximum.SYMBOLMINNOMMAXA––1.20A10.05–0.15A20.951.001.05D8.759.009.25D16.907.007.10E8.759.009.25E16.907.007.10B0.30–0.45C0.09–0.20L0.45–0.75eNOTENote 2Note 20.80 TYP10/5/2001R2902325 Orchard ParkwaySan Jose, CA 95131TITLE32A, 32-lead, 7 x 7 mm Body Size, 1.0 mm Body Thickness,0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)DRAWING NO.REV.32ABATmega8(L)2486O–AVR–10/04ATmega8(L)28P3DPIN1E1ASEATING PLANELB2B1A1B(4 PLACES)0º ~ 15ºREFeECCOMMON DIMENSIONS(Unit of Measure = mm)eBNote:1.
Dimensions D and E1 do not include mold Flash or Protrusion.Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").MINNOMMAX––4.5724A10.508––D34.544–34.798E7.620–8.255E17.112–7.493B0.381–0.533B11.143–1.397B20.762–1.143L3.175–3.429C0.203–0.356eB––10.160SYMBOLAeNOTENote 1Note 12.540 TYP09/28/01R2325 Orchard ParkwaySan Jose, CA 95131TITLE28P3, 28-lead (0.300"/7.62 mm Wide) Plastic DualInline Package (PDIP)DRAWING NO.28P3REV.B2912486O–AVR–10/0432M1-ADD11230Pin 1 IDE1SIDE VIEWETOP VIEWA3A2A1AK0.08 CPD2123PPin #1 Notch(0.20 R)COMMON DIMENSIONS(Unit of Measure = mm)SYMBOLMINNOMMAXA0.800.901.00A1–0.020.05A2–0.651.00A3E2bK0.20 REF0.18DLBOTTOM VIEWNote: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2.3.254.75BSC2.95eL3.105.00 BSCE1E20.304.75 BSC2.95Eeb0.235.00 BSCD1D2NOTE3.103.250.50 BSC0.300.400.500.6012oP––0––K0.20––8/19/04R2922325 Orchard ParkwaySan Jose, CA 95131TITLE32M1-A, 32-pad, 5 x 5 x 1.0 mm Body, Lead Pitch 0.50 mm,3.10 mm Exposed Pad, Micro Lead Frame Package (MLF)DRAWING NO.32M1-AREV.DATmega8(L)2486O–AVR–10/04ATmega8(L)ErratasThe revision letter in this section refers to the revision of the ATmega8 device.ATmega8Rev.
D, E, F, and G• CKOPT Does not Enable Internal Capacitors on XTALn/TOSCn Pins when 32 KHzOscillator is Used to Clock the Asynchronous Timer/Counter21. CKOPT Does not Enable Internal Capacitors on XTALn/TOSCn Pins when32 KHz Oscillator is Used to Clock the Asynchronous Timer/Counter2When the internal RC Oscillator is used as the main clock source, it is possible torun the Timer/Counter2 asynchronously by connecting a 32 KHz Oscillator betweenXTAL1/TOSC1 and XTAL2/TOSC2. But when the internal RC Oscillator is selectedas the main clock source, the CKOPT Fuse does not control the internal capacitorson XTAL1/TOSC1 and XTAL2/TOSC2. As long as there are no capacitors connected to XTAL1/TOSC1 and XTAL2/TOSC2, safe operation of the Oscillator is notguaranteed.Problem fix/WorkaroundUse external capacitors in the range of 20 - 36 pF on XTAL1/TOSC1 andXTAL2/TOSC2.
This will be fixed in ATmega8 Rev. G where the CKOPT Fuse willcontrol internal capacitors also when internal RC Oscillator is selected as main clocksource. For ATmega8 Rev. G, CKOPT = 0 (programmed) will enable the internalcapacitors on XTAL1 and XTAL2. Customers who want compatibility between Rev.G and older revisions, must ensure that CKOPT is unprogrammed (CKOPT = 1).2932486O–AVR–10/04Datasheet RevisionHistoryPlease note that the referring page numbers in this section are referred to this document.
The referring revision in this section are referring to the document revision.Changes from Rev.2486N-09/04 to Rev.2486O-10/041. Removed to instances of “analog ground”. Replaced by “ground”.2. Updated Table 7 on page 27, Table 15 on page 36, and Table 100 on page 241.3. Updated “Calibrated Internal RC Oscillator” on page 28 with the 1 MHz defaultvalue.4.
Table 89 on page 222 and Table 90 on page 222 moved to new section “PageSize” on page 222.5. Updated descripton for bit 4 in “Store Program Memory Control Register –SPMCR” on page 210.6. Updated “Ordering Information” on page 289.Changes from Rev.2486M-12/03 to Rev.2486N-09/041. Added note to MLF package in “Pin Configurations” on page 2.2. Updated “Internal Voltage Reference Characteristics” on page 40.3. Updated “DC Characteristics” on page 239.4. ADC4 and ADC5 support 10-bit accuracy.
Document updated to reflect this.Updated features in “Analog-to-Digital Converter” on page 193.Updated “ADC Characteristics” on page 245.5. Removed reference to “External RC Oscillator application note” from “External RC Oscillator” on page 27.Changes from Rev.2486L-10/03 to Rev.2486M-12/031. Updated “Calibrated Internal RC Oscillator” on page 28.Changes from Rev.2486K-08/03 to Rev.2486L-10/031. Removed “Preliminary” and TBDs from the datasheet.2. Renamed ICP to ICP1 in the datasheet.3.
Removed instructions CALL and JMP from the datasheet.4. Updated tRST in Table 15 on page 36, VBG in Table 16 on page 40, Table 100 onpage 241 and Table 102 on page 243.5. Replaced text “XTAL1 and XTAL2 should be left unconnected (NC)” afterTable 9 in “Calibrated Internal RC Oscillator” on page 28. Added text regarding XTAL1/XTAL2 and CKOPT Fuse in “Timer/Counter Oscillator” on page 30.6. Updated Watchdog Timer code examples in “Timed Sequences for Changingthe Configuration of the Watchdog Timer” on page 43.294ATmega8(L)2486O–AVR–10/04ATmega8(L)7. Removed bit 4, ADHSM, from “Special Function IO Register – SFIOR” on page56.8.
Added note 2 to Figure 103 on page 212.9. Updated item 4 in the “Serial Programming Algorithm” on page 235.10. Added tWD_FUSE to Table 97 on page 236 and updated Read Calibration Byte,Byte 3, in Table 98 on page 237.11. Updated Absolute Maximum Ratings* and DC Characteristics in “ElectricalCharacteristics” on page 239.Changes from Rev.2486J-02/03 to Rev.2486K-08/031. Updated VBOT values in Table 15 on page 36.2. Updated “ADC Characteristics” on page 245.3. Updated “ATmega8 Typical Characteristics” on page 246.4. Updated “Erratas” on page 293.Changes from Rev.2486I-12/02 to Rev.2486J-02/031. Improved the description of “Asynchronous Timer Clock – clkASY” on page24.2. Removed reference to the “Multipurpose Oscillator” application note and the“32 kHz Crystal Oscillator” application note, which do not exist.3.
Corrected OCn waveforms in Figure 38 on page 88.4. Various minor Timer 1 corrections.5. Various minor TWI corrections.6. Added note under “Filling the Temporary Buffer (Page Loading)” on page 213about writing to the EEPROM during an SPM Page load.7. Removed ADHSM completely.8. Added section “EEPROM Write during Power-down Sleep Mode” on page 21.9. Removed XTAL1 and XTAL2 description on page 5 because they were alreadydescribed as part of “Port B (PB7..PB0) XTAL1/XTAL2/TOSC1/TOSC2” onpage 5.10. Improved the table under “SPI Timing Characteristics” on page 243 andremoved the table under “SPI Serial Programming Characteristics” on page238.11. Corrected PC6 in “Alternate Functions of Port C” on page 59.12.
Corrected PB6 and PB7 in “Alternate Functions of Port B” on page 56.2952486O–AVR–10/0413. Corrected 230.4 Mbps to 230.4 kbps under “Examples of Baud Rate Setting”on page 156.14. Added information about PWM symmetry for Timer 2 in “Phase Correct PWMMode” on page 111.15. Added thick lines around accessible registers in Figure 76 on page 166.16. Changed “will be ignored” to “must be written to zero” for unused Z-pointerbits under “Performing a Page Write” on page 213.17. Added note for RSTDISBL Fuse in Table 87 on page 220.18.Updated drawings in “Packaging Information” on page 290.Changes from Rev.2486H-09/02 to Rev.2486I-12/021.Added errata for Rev D, E, and F on page 293.Changes from Rev.2486G-09/02 to Rev.2486H-09/021.Changed the Endurance on the Flash to 10,000 Write/Erase Cycles.Changes from Rev.2486F-07/02 to Rev.2486G-09/021 Updated Table 103, “ADC Characteristics,” on page 245.Changes from Rev.2486E-06/02 to Rev.2486F-07/021Changes in “Digital Input Enable and Sleep Modes” on page 53.2Addition of OCS2 in “MOSI/OC2 – Port B, Bit 3” on page 57.3The following tables has been updated:Table 51, “CPOL and CPHA Functionality,” on page 129, Table 59, “UCPOL Bit Settings,” on page 155, Table 72, “Analog Comparator Multiplexed Input(1),” onpage 192, Table 73, “ADC Conversion Time,” on page 197, Table 75, “Input Channel Selections,” on page 203, and Table 84, “Explanation of Different Variablesused in Figure 103 and the Mapping to the Z-pointer,” on page 218.5Changes in “Reading the Calibration Byte” on page 231.6 Corrected Errors in Cross References.Changes from Rev.2486D-03/02 to Rev.2486E-06/021Updated Some Preliminary Test Limits and Characterization DataThe following tables have been updated:Table 15, “Reset Characteristics,” on page 36, Table 16, “Internal Voltage Reference Characteristics,” on page 40, DC Characteristics on page 239, Table , “ADCCharacteristics,” on page 245.2Changes in External Clock FrequencyAdded the description at the end of “External Clock” on page 30.Added period changing data in Table 99, “External Clock Drive,” on page 241.296ATmega8(L)2486O–AVR–10/04ATmega8(L)3Updated TWI ChapterMore details regarding use of the TWI bit rate prescaler and a Table 65, “TWI BitRate Prescaler,” on page 170.Changes from Rev.2486C-03/02 to Rev.2486D-03/021Updated Typical Start-up Times.The following tables has been updated:Table 5, “Start-up Times for the Crystal Oscillator Clock Selection,” on page 26,Table 6, “Start-up Times for the Low-frequency Crystal Oscillator Clock Selection,”on page 26, Table 8, “Start-up Times for the External RC Oscillator Clock Selection,” on page 27, and Table 12, “Start-up Times for the External Clock Selection,”on page 30.2 Added “ATmega8 Typical Characteristics” on page 246.Changes from Rev.2486B-12/01 to Rev.2486C-03/021Updated TWI Chapter.More details regarding use of the TWI Power-down operation and using the TWI asMaster with low TWBRR values are added into the datasheet.Added the note at the end of the “Bit Rate Generator Unit” on page 167.Added the description at the end of “Address Match Unit” on page 167.2Updated Description of OSCCAL Calibration Byte.In the datasheet, it was not explained how to take advantage of the calibration bytesfor 2, 4, and 8 MHz Oscillator selections.
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