ATmega128 (961732), страница 8
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However, it is possible to take advantage of the entireExternal Memory by masking the higher address bits to zero. This can be done by usingthe XMMn bits and control by software the most significant bits of the address. By setting Port C to output 0x00, and releasing the most significant bits for normal Port Pinoperation, the Memory Interface will address 0x0000 - 0x1FFF. See the following codeexamples.Assembly Code Example(1);;;;;OFFSET is defined to 0x2000 to ensureexternal memory accessConfigure Port C (address high byte) tooutput 0x00 when the pins are releasedfor normal Port Pin operationldi r16, 0xFFout DDRC, r16ldi r16, 0x00out PORTC, r16; release PC7:5ldi r16, (1<<XMM1)|(1<<XMM0)sts XMCRB, r16; write 0xAA to address 0x0001 of external; memoryldi r16, 0xaasts 0x0001+OFFSET, r16; re-enable PC7:5 for external memoryldi r16, (0<<XMM1)|(0<<XMM0)sts XMCRB, r16; store 0x55 to address (OFFSET + 1) of; external memoryldi r16, 0x55sts 0x0001+OFFSET, r16C Code Example(1)#define OFFSET 0x2000void XRAM_example(void){unsigned char *p = (unsigned char *) (OFFSET + 1);DDRC = 0xFF;PORTC = 0x00;XMCRB = (1<<XMM1) | (1<<XMM0);*p = 0xaa;XMCRB = 0x00;*p = 0x55;}Note:1.
The example code assumes that the part specific header file is included.Care must be exercised using this option as most of the memory is masked away.332467M–AVR–11/04System Clock andClock OptionsClock Systems and theirDistributionFigure 18 presents the principal clock systems in the AVR and their distribution. All ofthe clocks need not be active at a given time. In order to reduce power consumption, theclocks to modules not being used can be halted by using different sleep modes, asdescribed in “Power Management and Sleep Modes” on page 42. The clock systemsare detailed below.Figure 18. Clock DistributionAsynchronousTimer/CounterGeneral I/OmodulesADCCPU CoreRAMFlash andEEPROMclkADCclkI/OclkCPUAVR ClockControl UnitclkASYclkFLASHReset LogicSource clockWatchdog clockClockMultiplexerTimer/CounterOscillatorExternal RCOscillatorExternal clockWatchdog TimerWatchdogOscillatorCrystalOscillatorLow-FrequencyCrystal OscillatorCalibrated RCOscillatorCPU Clock – clkCPUThe CPU clock is routed to parts of the system concerned with operation of the AVRcore.
Examples of such modules are the General Purpose Register File, the Status Register and the data memory holding the Stack Pointer. Halting the CPU clock inhibits thecore from performing general operations and calculations.I/O Clock – clkI/OThe I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, andUSART. The I/O clock is also used by the External Interrupt module, but note that someexternal interrupts are detected by asynchronous logic, allowing such interrupts to bedetected even if the I/O clock is halted.
Also note that address recognition in the TWImodule is carried out asynchronously when clkI/O is halted, enabling TWI address reception in all sleep modes.Flash Clock – clkFLASHThe Flash clock controls operation of the Flash interface. The Flash clock is usuallyactive simultaneously with the CPU clock.34ATmega1282467M–AVR–11/04ATmega128Asynchronous Timer Clock –clkASYThe Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clockeddirectly from an external 32 kHz clock crystal. The dedicated clock domain allows usingthis Timer/Counter as a real-time counter even when the device is in sleep mode.ADC Clock – clkADCThe ADC is provided with a dedicated clock domain. This allows halting the CPU andI/O clocks in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion results.Clock SourcesThe device has the following clock source options, selectable by Flash fuse bits asshown below.
The clock from the selected source is input to the AVR clock generator,and routed to the appropriate modules.Table 6. Device Clocking Options SelectDevice Clocking OptionCKSEL3..0(1)External Crystal/Ceramic Resonator1111 - 1010External Low-frequency Crystal1001External RC Oscillator1000 - 0101Calibrated Internal RC Oscillator0100 - 0001External ClockNote:00001. For all fuses “1” means unprogrammed while “0” means programmed.The various choices for each clocking option is given in the following sections. When theCPU wakes up from Power-down or Power-save, the selected clock source is used totime the start-up, ensuring stable Oscillator operation before instruction execution starts.When the CPU starts from reset, there is as an additional delay allowing the power toreach a stable level before commencing normal operation.
The Watchdog Oscillator isused for timing this real-time part of the start-up time. The number of WDT Oscillatorcycles used for each time-out is shown in Table 7. The frequency of the Watchdog Oscillator is voltage dependent as shown in the “ATmega128 Typical Characteristics” onpage 335.Table 7. Number of Watchdog Oscillator CyclesDefault Clock SourceTypical Time-out (VCC = 5.0V)Typical Time-Out (VCC = 3.0V)Number of Cycles4.1 ms4.3 ms4K (4,096)65 ms69 ms64K (65,536)The device is shipped with CKSEL = “0001” and SUT = “10”. The default clock sourcesetting is therefore the Internal RC Oscillator with longest startup time. This default setting ensures that all users can make their desired clock source setting using an InSystem or Parallel Programmer.352467M–AVR–11/04Crystal OscillatorXTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which canbe configured for use as an On-chip Oscillator, as shown in Figure 19. Either a quartzcrystal or a ceramic resonator may be used.
The CKOPT fuse selects between two different Oscillator Amplifier modes. When CKOPT is programmed, the Oscillator outputwill oscillate will a full rail-to-rail swing on the output. This mode is suitable when operating in a very noisy environment or when the output from XTAL2 drives a second clockbuffer. This mode has a wide frequency range. When CKOPT is unprogrammed, theOscillator has a smaller output swing. This reduces power consumption considerably.This mode has a limited frequency range and it can not be used to drive other clockbuffers.For resonators, the maximum frequency is 8 MHz with CKOPT unprogrammed and 16MHz with CKOPT programmed.
C1 and C2 should always be equal for both crystals andresonators. The optimal value of the capacitors depends on the crystal or resonator inuse, the amount of stray capacitance, and the electromagnetic noise of the environment. Some initial guidelines for choosing capacitors for use with crystals are given inTable 8.
For ceramic resonators, the capacitor values given by the manufacturer shouldbe used.Figure 19. Crystal Oscillator ConnectionsC2C1XTAL2XTAL1GNDThe Oscillator can operate in three different modes, each optimized for a specific frequency range. The operating mode is selected by the fuses CKSEL3..1 as shown inTable 8.Table 8. Crystal Oscillator Operating ModesCKOPTCKSEL3..1Frequency Range(MHz)Recommended Range for CapacitorsC1 and C2 for Use with Crystals1101(1)0.4 - 0.9–11100.9 - 3.012 pF - 22 pF11113.0 - 8.012 pF - 22 pF0101, 110, 1111.0 -12 pF - 22 pFNote:1.
This option should not be used with crystals, only with ceramic resonators.The CKSEL0 fuse together with the SUT1..0 fuses select the start-up times as shown inTable 9.36ATmega1282467M–AVR–11/04ATmega128Table 9. Start-up Times for the Crystal Oscillator Clock SelectionCKSEL000001111Notes:Low-frequency CrystalOscillatorSUT1..0Start-up Time fromPower-down andPower-saveAdditional Delayfrom Reset (VCC= 5.0V)Recommended Usage00(1)258 CK4.1 msCeramic resonator, fastrising power01258 CK(1)65 msCeramic resonator,slowly rising power101K CK(2)–Ceramic resonator,BOD enabled111K CK(2)4.1 msCeramic resonator, fastrising power001K CK(2)65 msCeramic resonator,slowly rising power0116K CK–Crystal Oscillator, BODenabled1016K CK4.1 msCrystal Oscillator, fastrising power1116K CK65 msCrystal Oscillator,slowly rising power1.
These options should only be used when not operating close to the maximum frequency of the device, and only if frequency stability at start-up is not important for theapplication. These options are not suitable for crystals.2. These options are intended for use with ceramic resonators and will ensure frequency stability at start-up. They can also be used with crystals when not operatingclose to the maximum frequency of the device, and if frequency stability at start-up isnot important for the application.To use a 32.768 kHz watch crystal as the clock source for the device, the Low-frequency Crystal Oscillator must be selected by setting the CKSEL fuses to “1001”.
Thecrystal should be connected as shown in Figure 19. By programming the CKOPT fuse,the user can enable internal capacitors on XTAL1 and XTAL2, thereby removing theneed for external capacitors. The internal capacitors have a nominal value of 36 pF.When this Oscillator is selected, start-up times are determined by the SUT fuses asshown in Table 10.Table 10. Start-up Times for the Low-frequency Crystal Oscillator Clock SelectionSUT1..0Start-up Time fromPower-down andPower-saveAdditional Delayfrom Reset (VCC =5.0V)Recommended Usage(1)4.1 msFast rising power or BOD enabled01(1)1K CK65 msSlowly rising power1032K CK65 msStable frequency at start-up0011Note:1K CKReserved1. These options should only be used if frequency stability at start-up is not importantfor the application.372467M–AVR–11/04External RC OscillatorFor timing insensitive applications, the External RC configuration shown in Figure 20can be used.
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