Arthur Sherman - Chemical Vapor Deposition for Microelectronics (779637), страница 17
Текст из файла (страница 17)
The epi film has different growth rateson different crystal faces. For example, deposition is fastest on (112) and slowest on (111). Pattern shift is illustrated in Figure 22 for SiCI 4 and Figure 23 forSiH 2 CI 2 . Here we can clearly see that reduced pressure has minimized this problem in both cases.Atmospheric Pressuret = 11. 2 llm100 Torrt= 13.8Figure 22: Pattern shift in 3iCI 4 deposition. 24llmThermal CVD of Dielectrics and SemiconductorsAtmospheric Pressuret = 12.5 lJm89100 Torrt = 17.5 lJmFigure 23: Pattern shift in SiH 2 CI 2 deposition. 243.5.6 Low-Temperature Epi SiliconAs device geometries become smaller and smaller, the epi layers also scaledown and become thinner.
The thinner the epi layer, the more serious the autodoping problem becomes. Very sharp transitions are needed, and cannot be obtained readily at normal temperatures (> 1000°C). Therefore, there is great interest in finding a low-temperature epi process that produces good quality epilayers.A number of researchers have grown epi films at temperatures as low as800°C. 2S However, in all cases, a high temperature (1040° to 1180°C) clean stepwas first needed.The high-temperature cleaning or etching step can be avoided by using aplasma to etch at low temperature. 26 ,27.
Both H2 and Ar plasmas were tried.When H2 is used, there should be both a chemical etch effect as well as sputtering due to ion bombardment. With Ar, the principal effect should be physicalsputtering of impurities and native oxide. It is interesting to note that the keyfeature of the argon clean procedure is that deposition gas flow must overlapthe etching process. 27 If this is not done, the Si grows a new native oxide layerin 1 second.Using these techniques, epi films have been deposited at temperatures aslow as 650°C.
At these temperatures, there is no autodoping problem. However,whether or not these are useful films for devices is not yet proven. Also, it remains to be seen whether a reactor based on these techniques will be economically viable.Another approach to this problem involves heating the wafer at 750°F atvery low pressures «10-10 Torr) prior to deposition.28 This has the effect ofremoving the native oxide by evaporation of SiO. Depositions were achievedin the temperature range of 750° to 850°C in SiH 4 + H2 .
Since the authors weredeveloping a hot-wall system with many wafers stacked close to each other,the deposition was carried out at 2 mTorr. Deposition rates of 20 to 45 A/minwere achieved. As expected, dopant transition widths were very narrow, several hundred angstroms. Again, device studies on such a system have not yetbeen done.90Chemical Vapor Deposition for MicroelectronicsREFERENCES1. Kern, W., Chemical Methods of Film Deposition, in Thin Film Processes,eds.
J.L. Vossen and W. Kern, Academic Press, NY (1978).2. Kern, W. and Rosier, R.S., Advances in deposition processes for passivationfilms.J. Vac. Sci. Technol. 14:1082 (1977).3. Rosier, R.S., Low pressure CVD production processes for poly, nitride,and oxide. Solid State Techno I. 20(4) :63 (1977).4. Kemlage, B.M., Film integrity of high-temperature LPCVD-Si0 2 in ChemicalVapor Deposition, Eighth International Conference on Chemical VaporDeposition, eds. J.M. Blocker, ,-Ir., G.E. Vuillard and G. Wahl [(Electrochemical Society, Pennington, NJ (1981 )] , pg. 418.5.
Ramiller, C. L., and Yau, L., Borophosphosilicate glass for low temperature reflow. Semicon. West Techn. Proc. 5 :29 (1982).6. Levy, R.A., Vincent, S.M., and McGahan, T.E., Evaluation of the phosphorus concentration and its effect on viscous flow and reflow in phosphosilicate glass. J. Electrochem.
Soc. 132:1472 (1985).7. Becker, F.S., Pawlik, D., Schafer, H. and Standigl, G., Process and film characteri zat ion of low pressu re tetraethylorthosi Iicateborophosphosil icateglass.J. Vac. Sci. Technol. B4(3):732 (1986).8. Smolinsky, G., The low pressure chemical vapor deposition of silicon oxidefilms in the temperature range 450° to 600°C from a new source: diacetoxyditertiarybutoxysilane, in Proceedings of the 1986 Symposiumon VLSI Technology, San Diego, May 1986 (I EEE Catalog #86CH2318-4).9. Habraken, F.H.P.M., Kuiper, A.E.T., Oostrom, A.V., and Tamminga, Y.,Characterization of low-pressure chemical vapor deposited and thermallygrown silicon nitride films. J.
Appl. Phys. 53(1) :404 (1982).10. Meyerson, B.S., and Olbricht, W., Phosphorus-doped polycrystalline siliconvia LPCVD; I. process characterization. J. Electrochem. Soc. 131 :2361(1984).11. Fripp, A. L., and Slack, L.H., Resistivity of doped polycrystalline siliconfilms.J. Electrochem. Soc. 120:145 (1973).12. Cowher, M.E., and Sedgwick, T.O., Chemical vapor deposited polycrystalline silicon. J. Electrochem.
Soc. 119:1565 (1972).13. Kamins, T.L, Hall mobility in chemically deposited polycrystalline silicon.J. Appl. Phys. 42:4357 (1971).14. Mandurah, M.M., Saraswat, K.C., and Helms, R.C., Dopant segregation inpolycrystalline silicon. J. Appl. Phys. 51 (11) :5755 (1980).15. Bloem, J., and Giling, L.J., Mechanisms of the Chemical Vapor Depositionof Silicon, in Current Topics in Materials Science, Vol. I, ed. Kaldis, E.,[(North-Holland Publishing (1978)].16. Klingman, K.J., and Lee, H.H., Design of epitaxial CVD reactors, I. Theoretical relationships for mass and heat transfer, J. Crys.
Growth 72:670(1985).17. Toor, I.A., and Lee, H.H., Design of epitaxial CVD reactors, II. Design considerations and alternatives. J. Crys. Growth 72:679 (1985).18. Corboy, J.F., and Pagliaro, R., Jr., An investigation of the factors that influence the deposit/etch balance in a radiant-heated silicon epitaxialreactor, RCA Review 44 :231 (1983).Thermal CVD of Dielectrics and Semiconductors9119. Atherton, R.W., Fundamentals of silicon epitaxy. Semiconductor International (Nov.1981), p. 117.20.
Jenkins, M.W., A new preferential etch for defects in sil icon crystals. J.Electrochem. Soc. 124 :757 (1977).21. Werkhoven, C.J., Source transport and precipitation of metallic impurities in Si epitaxy. in Aggregation Phenomena of Point Defects in Silicon, eds. Sirth, E. and Goorissen, J. [(Electrochemical Society Pennington, NJ (1983)], Vol. 83-4, p. 144.22. Ogirima, M., Saida, H., Suzuki, J.
and Maki, J., Low pressure silicon epitaxy. J. Electrochem. Soc. 124 :903 (1977).23. Kul karni, S.B., and Kozul, A.A., Boron autodoping in reduced-pressureepitaxy. The Electrochemical Society Extended Abstracts [(Electrochemical Society, Pennington, NJ (1980)], Abstract No. 540, p. 1351.24. Cullen, G.W., Corboy, J.F., and Metzl, R., Epitaxial reactor systems: Characteristics, operation, and epitaxy costs.
RCA Review 44: 187 (1983).25. Richman, D., Chiang, Y.S., and Robinson, P.H., Low temperature vaporgrowth of homoepitaxial silicon. RCA Review 31 :613 (1970).26. Townsend, W.G. and Uddin, M.E., Epitaxial growth of silicon fron, SiH 4in the temperature range 800° to 1150°C. Solid State Electronics 16:39(1973).27. Donahue, T.J., Burger, W.R. and Reif, R., Low temperature silicon epitaxy using low-pressure chemical vapor deposition with and withoutplasma enhancement.
Appl. Phys. Lett. 44 :346 (1984).28. Meyerson, B.S., Gannin, E. and Smith, D.A., Low temperature silicon epitaxy by hot wall ultra high vacuum/low pressure chemical vapor deposition techniques. Electrochem. Soc. Fall Mtg., Oct. 1985, Extended Abstracts 85-2, pg. 401.4Thermalcve of Metallic Conductors4.1 INTRODUCTIONAs before, we observe that there are many metallic conducting films thatcan be deposited by CVD.
1 It is not our intention to catalogue all of these.Rather, we will restrict our attention to those films either in use in integratedcircuit manufacture, or that have good potential for such use.In contrast to the films described in the last chapter, the ones to be discussed in this chapter have only become of interest recently.
Up to the present,the integrated circuit gate electrodes have been fabricated from LPCVD polysil icon, wh ich is heavily doped with phosphorus in a separate step (either by diffusion or ion implantation). Such heavily doped polysilicon can have resistivities as low as 500 pn-cm, so it behaves as a conductor, although not a very goodone. Its compatibility with standard processing steps, however, make it a veryattractive gate material.The final metallization of the standard single-layer metal conductor circuits has been provided by sputtered aluminum.
As required, the sputtered AIcan be doped with Si to minimize spiking of AI into the Si that it must contact.It can also be doped with copper to minimize electromigration effects.In recent years, VLSI requirements have led to closely spaced long interconnection lines with smaller cross sections. 2 The ensuing RC time delay canlimit the speed with which circuits can be operated. Also, the power consumption due to high resistance can be appreciable and heat the circuits more thanpermitted.
Therefore, the doped poly available is becoming inadequate for thenew generation of circuits. This has led to the development of refractory metalsilicide films because of their high-temperature processing capability. Initially,they were deposited by evaporation or sputtering.