Arthur Sherman - Chemical Vapor Deposition for Microelectronics (779637), страница 16
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The deposition rates of Si as a function of temperature, at atmospheric pressure, from theCVD of the above source gases are shown in Figure 16.0 0 -0-0-0-0C' 0..5"E++-t.:.+--+--6_"-Eo SiH4-~ ......+ SiH2 Cl20 ..... '0,4--+'f'" --l-..:r~-,~,~0.2elle~ 0.1~,otS""",.0' '0~,'."\~~,~ SiHC13o Si Cl~",',,'\+,~,'0,,'~,,+~(jj0.050.02,~,"",-+:,'+", , +"".6 ,0'',','0,,,,\)0.010..910 3- - . =;=(OK)Figure 16: Silicon growth rates as a function of temperature. All reactants"'0.1 mol % in H 2 .
15Several features of these curves are significant. At low temperatures, thereactions are considered to be surface controlled, so there is an overabundanceThermal CVD of Dielectrics and Semiconductors83of reactant near the surface and the rate of deposition varies rapidly with surfacetemperature. At higher temperatures, the deposition rate appears almost independent of temperature, as would be expected for a diffusion-controlled deposition.At the lower temperatures, the films are polycrystalline. Epitaxial films areproduced for temperatures at or above values at the knee of each curve.
Therefore, epi can be grown from SiH 4 at temperatures as low as 800°C. On theother hand, epi films from SiCI 4 require deposition temperatures above 11 oaoc.In growing epi films, the most commonly used reactant is SiCI 4 . It is inexpensive and easily available. Another reason for its popularity is that it leavesrelatively little deposit on the cold walls of the reactor bell jar, so that cleaningis less of a problem.
Also, when deposits are done at temperatures between1100° and 1300°C, film quality is excellent in terms of crystallographic defects.Where thicker films are needed, SiHCI 3 is often used because of its higherdeposition rate. In other respects, it is similar to SiCI 4 . When lower depositionrates become critical, SiCI 2 H2 is being used.Finally, epi films deposited from SiH 4 at low temperatures (~1000°C) areinteresting, but difficulties due to the heavier Si deposits on the cold reactorwalls has Iimited interest in this approach.The typical epi silicon reactor operates in the diffusion-controlled regimeat high rates of deposition. The behavior of such a reactor is governed by thefluid dynamics of multicomponent gases.
The gas phase reactions discussed inChapter 1 are generally neglected.In principle, epi reactors that operate in the diffusion-eontrolled regimecould be designed by solving the partial differential equations governing thefluid dynamics 16 ,17 so that deposition rates could be predicted. In fact, sucha procedure is generally not followed, since experimental evaluation of theflow behavior seems to be preferred. 183.5.2 Surface EffectsUsing the proper CVD process for Si deposition in a system which has thefluid mechanics properly arranged is not sufficient to produce quality epi Sifilms.
Assuming we are hoping to grow on a single-crystal substrate, this substrate surface must be properly prepared. It must have "atomic" steps on thesurface to provide nucleation sites. Such atomic steps are obtained by cuttingthe substrate several degrees off the normal to the boule growth axis.Secondly, the wafer must be very "clean." Even a clean substrate will have20 to 50 A layer of native oxide on it, and/or some carbon, and this will beenough to impede nucleation and give rise to many defects. 1s After wafers arecleaned and inserted into the reactor, there is still the oxide layer to be removedas well as possibly some carbon on the surface.
The traditional way of dealingwith this phenomena is to operate a high-temperature HCI (1200°C) etch before attempting depositions. This etches away the native oxide, and any carbonon the surface diffuses into the bulk at this temperature.It is also thought that the success of the chlorosilane + H2 process, in producing high-quality epi Si films, is related to the HCI produced in the reaction.It is thought that the process is close to equilibrium, and that there is significant etching by HCI going on while Si is being deposited.84Chemical Vapor Deposition for Microelectronics3.5.3 DefectsEven when epi silicon films are successfully grown, defects in the film canstill be observed.
In a commercial reactor, it is never possible to drive the concentration of such defects to zero. Specifications are usually defined as #/cm 2allowable.The common defects can be seen with optical microscopes, and they become more clearly visible after suitable etches. 2o The most common defectsare stacking faults and spikes (see Figure 17). These can be caused by local surface imperfections as well as surface particulates. Another defect frequentlyoccurring is the slip lines shown in Figure 18.'.Figure 17: Stacking faults and spikes. 19Thermal CVD of Dielectrics and Semiconductors85Figure 18: Slip lines with stacking faults. 19If the high-temperature (1200°C) etch is used and a high·temperature deposition as well, stacking faults and spikes tend to be minimized.
Unfortunately,this is when slip becomes a real problem. Slip occurs as parts of the singlecrystal move relative to each other along crystallographic planes, due to highthermal stresses. They generally occur at the outer edge of the wafer where itis stressed. For example, a common location for such slip defects are the pointsat which the wafer edge rests on the susceptor.Obviously, if there are a huge number of such defects, it will be impossibleto build qual ity devices on such wafers. Even when there are a few such de·fects, they can be very harmful because they seem to attract metallic impurities.Thus, what started out as mechanical defects gives rise to metallic precipitationdefects which are much more damaging to circuit operation.
213.5.4 AutodopingIn the fabrication of integrated circuits, heavily-doped islands are createdin the bare substrate surface. This surface is then covered with a lightly-dopedepi film. The objective is to achieve a sharp junction between the heavily- andlightly-doped regions. If the epi layer above the doped region is contaminatedwith dopant, this is called vertical autodoping. If the epilayer to the side of theburied layer is contaminated, this is referred to as lateral autodoping.Autodoping of epi films can be explained by two mechanisms. For one,dopant could diffuse (solid state diffusion) from the buried layer to the epifilm during its formation.
Second, the dopant from the buried layer can vapor'ize, enter the reactor gas flow, and be incorporated as the surface reaction pro·ceeds. The concensus seems to be that the latter effect is the predominant one.In fact, it is well known that coating the back of the wafer with oxide reducesthe autodoping, and this can only relate to gas phase transport.Reactor operating conditions also playa role, since it is well known thatarsenic autodoping is reduced when the reactor is operated at reduced pressures(i.e., 80 Torr).22 Because of the ability to reduce arsenic autodoping drasticallyat low pressure, this has become an important commercial process.86Chemical Vapor Deposition for MicroelectronicsFor epi depositions with arsenic buried layers, we can see the influence ofpressure on dopant profile for the SiCI 4 process in Figure 19 and for the SiH 2 CI 2process in Figure 20.
In both cases, as the pressure is reduced, the width of thetransition region is less. Measurements were made by SIMS. The heavily-dopedburied layer substrate is shown on the right-hand side of these figures, and theepi film is on the left.zor<r-0:::zwuouuz~zw(J)0:::<DEPTH(micrometers)Atmospheric PressureDEPTH(micrometers)100 TorrFigure 19: Deposition from SiCI 4 at 1150°C. 24Thermal CVD of Dielectrics and Semiconductors87t~c:r.J./tZW/'U.,/Zo"./.u"u_..4'F1.35fLm.:-..;./.. :,..:::.~. ._ .
. . .:_~;. ....,.._.--+-2.7}-Lm"~~~l-LJJ~~.L.L.....I~~~""""~1DEPTH4(m i crometers)Atmospheric Pressurezot-<c:r.t-WUZouuzwU')Ct::-<l015~~~....l.....L..J~~..4....L..L..L-J:~~~.....L.L..JJ....o....i....J....L.L~...4JoDEPTH(m 1 cromators)100 TorrFigure 20: Deposition from Si H 2 CI 2 at 1080°C. 24Another interesting feature that can be seen from Figures 19 and 20 is thethinner transition region achieved with SiCI 4 as compared to SiCI 2 H 2 • It appears that the thinnest transition regions occur with these molecules that have88Chemical Vapor Deposition for Microelectronicsthe greatest chlorine concentrations.
It is thought that the HCI generated in thereaction can etch the growing film at the impurity lattice sites, and therebyminimize the inclusion of dopant.Finally, we should note that although arsenic autodoping can be substantially reduced by low-pressure operation, experimental evidence suggests thatboron autodoping is not influenced by pressure. 233.5.5 Pattern ShiftThe first step in the fabrication of modern bipolar integrated circuits is thecreation of heavily-doped islands in the silicon substrate within which to fabricate the circuits.
In the process of creating these "buried layers, II the area theyoccupy has a surface that lies somewhat below the surface of the undoped substrate. The typical appearance of such a buried layer is illustrated in Figure 21.Before EpiFigure 21: Buried layer test patterns. 24Pattern shift is the phenomena that occurs when one attempts to grow anepilayer on such a nonuniform surface.
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