Arthur Sherman - Chemical Vapor Deposition for Microelectronics, страница 13

They have beenused as a final passivation film to protect against scratches and to getter mobileion impurities (when doped with phosphorus). Another application has beenas an interlayer dielectric between the gate polysilicon and the aluminum metalization. Initially, most such films were deposited in atmospheric pressure systems. In recent years, low pressure processes have assumed greater importance.We will begin by examining the atmospheric process.3.2.1 Atmospheric PressureAlthough the atmospheric pressure Si0 2 film deposition process was thefirst CVD process used, it continues in use today because it can be run success-66Thermal CVD of Dielectrics and Semiconductors67fully at low temperatures (400° to 450°C).

Therefore, it can be used as a finalpassivation film over aluminum, which would be damaged with processingtemperatures over 500°C.If SiH 4 is mixed with 02, using an oxygen to SiH 4 ratio above 3:1, andthis mixture is heavily diluted with an inert gas, then Si0 2 will be depositedon a hot plate at temperatures above 240°C. 2 The typical reactor is a coldwall type where the wafer holder is heated. The walls are cooled to try to minimize the deposition on them so that reactor cleaning is kept to a minimum.Several commercial reactors are available that implement this process, andthey will be reviewed in Chapter 6.If the Si H4 /0 2 mixture is not sufficiently diluted with an inert gas, thengas phase nucleation typically occurs and Si0 2 particulates are formed.

Generally, N2 is used as the diluent, but some work has been done with Ar, CO 2 ,and He. Depending on the reactor configuration, an inert gas effects the deposition rates in different ways.For most applications of CVD Si0 2, the oxide is doped with PH 3 so thata film of phosphosilicate glass is formed. This film is not a mixture of P20 Sand Si0 2, but rather a chemical compound of composition (Si0 2)x·(P 20 s h-x.It is also possible to deposit borosilicate glass using 8 2H6 rather than PH 3 .Finally, an interesting new material fabricated using both PH 3 and B2H6 , borophosphosilicate glass, will be considered later.

For the moment, we will restrictour attention to phosphosilicate glass films.In order to see more clearly the effect of deposition temperature and oxygen/hydride ratio (hydride = SiH 4 + PH 3 ) on film deposition rate, we considerthe three-dimensional plot shown in Figure 1. As expected, increasing thedeposition temperature increases the film deposition rate. On the other hand,too high an 02-to-hydride ratio actually decreases the deposition rate. It isspeculated that the excess O2 adsorbs onto the surface and prevents the Si H4from adsorbing and decomposing there.Si H4 / PH 3 • 20: IOIL UEN T . N2TOTAL GAS FLOWII t / min2000E1600~-Lou1200S:EC'800~u;C'~400Lou0~~Figure 1: Deposition rate of PSG films. 268Chemical Vapor Deposition for MicroelectronicsVarying the Si H4 /PH 3 ratio with other parameters held constant leads todifferent percentages of P2 0 S in the Si0 2 .

For example, with 8% PH 3 in (SiH 4 +PH 3 ) at approximately 450°C, one obtains 6% P2 0 S in (P 2 0 S + Si0 2 ). Toomuch phosphorus in the film can be deleterious, because it may result in ahygroscopic glass which can lead to metal corrosion problems.The stress in such Si0 2 films when deposited on Si wafers in this processis always tensile. Typical stress values and their variation with deposition rateare shown in Figure 2.

Note that higher deposition temperatures lead to higherstresses. Also, depositing the films with wet N2 served to reduce the stressesfound. The concern with stress arises when it is realized that thin films overuneven topography will end up cracking if they have tensile stresses built intothem. Since one of the major applications of this film is as a final passivationlayer over the completed integrated circuit, its tendency to crack is of concern.We will cover plasma silicon nitride films in Chapter 5, and we will note thatone of the more desirable features of these films is that they tend to havecompressive stresses.40.--------------------------,j:: ?~::25-----1~~~ 2.0A- 450'C,B- 450'C,C- 350'C,0- 350' C,;;;1.5DRY HzWET HzDRY HzrET Hz24Figure 2: Silicon dioxide film stress versus deposition rate.

2Clearly, there are many parameters that may be controlled during thedeposition of PSG by atmospheric pressure low-temperature CVD. They inturn influence several film characteristics. An interesting qualitative presentation of parameters and trends is shown in Figure 3. It is based on experimentsdone over a period of time.The low-temperature depositions described in the present section canbe used for either interlayer dielectrics or final passivation films.

Their primarydisadvantage is one of film quality, because the process is susceptible to gasphase nucleation and incorporation of particles into the film.3.2.2 Low-PressureIIn the mid-1970 s, it was realized that low-pressure CVD processing couldhave significant advantages over atmospheric pressure systems. By reducing thepressure, it was found that the diffusion coefficient was sufficiently enhancedthat deposition became surface controlled (see Chapter 1). In this case, waferscould be stacked closely and placed in a diffusion furnace to be processedThermal CVD of Dielectrics and Semiconductors69DIRECTION OF ARROWS INDICATES RELATIVE INCREASE OR DECREASE/ " STRONG;H-HIGHCVD PARAMETERSSiH 4 + PH 3HYDRIDEFLOW RATETINEPH 3HYDRIDERAT \0STH4OXYGENRAT 10SIH4 + PH302DE PO SIT IONTEMPERATUREDILUENTGAS FLOWRATEWATERVAPORADDITIONTHzTINEH2 OfiiE-::::rSLlGHT~- .

NONEL- LOW OXYGEN RATIODEPOSITIONRATErEFFECTS ON FILMPHOSPHO RUSINTRINSICCONTENTSTRESS/----..I -J /I ~ r-/1ttft~--.~~/~~~----.-----..~Figure 3: Effect of key parameters on CVD dioxide deposition?(hot-wall system). Since the temperature could be maintained very uniformly,deposition uniformity was excellent. Of equal importance, the large number ofwafers that could be processed in each batch made the economics very favor3able. A typical hot tube reactor for low-pressure CVD is shown in Figure 4.The major design problem with such a reactor involves finding conditionsfor which the deposition is not only uniform on each wafer, but is uniform fromwafer to wafer. Of course, the deposition rate has to remain high to retain thethroughput advantage.PRESSURESENSORWAFERLOAD/UNLOADEND CAPEXHAUSTTOPUMPc::::=:::J c=::::J c:=::=J3-l0NE RESISTANCE HEATERFigure 4: Low-pressure CVD reactor.

270Chemical Vapor Deposition for MicroelectronicsFirst attempts were to run the process with Si H 4 and 02. When this wasdone, films with good uniformity were deposited at 445°C and 1.0 Torr, asshown in Figure 5. However, the deposition rate was limited to 20 to 30 A/minwith a wafer spacing of 3/8 ".

Attempts to push to higher deposition rates (byincreasing SiH 4 and/or O 2 flow rates) led to hazy deposits which indicated gasphase nucleation. These deposition rates were too low to be competitive withthe existing cold wall systems.5000IT4000 - PN2~02ent3000Zf3~II~o~NoenI0.....2000ISiH4(SeCM)-- 445° e (FLAT)-1.0 TORR- 2.5 SLM- 200 SeeM- 45 MIN.'...0',"~' ..a-~.......,,-11""0.... -'-~--",,055~2SI~~I1000---.Io16824403248566468WAFER POSITION (3/8" SPACING)50004000-~.....,~ 3000wzIT - 445°CI IPN2SiH4t0.. .....i: 20000....l---0-."-.'<lilII--No"0"-en 1000o-1.0 TORR- 2.5 SLM- 55 SeeM- 45 MIN...-.- ~-...- .....:.., -.....

'.".~oI8.".........0- • ..-"--,-'T-0--- ....~~.-.-..2432500200",tY' .....----I1602(SCCM)I40485610064WAFER POSITION (3/8" WAFER SPACING)Figure 5: SiH 4 + O 2 reaction for Si0 2 films. 3Thermal CVD of Dielectrics and Semiconductors71Attention was then turned to a higher temperature, low-pressure process.Although such films would not be useful for final passivation, they could provide valuable interlayer dielectrics. At first, SiH 4 with N 2 0 was tried, wherethe reaction would proceed as follows:(1 )Good results were obtained at 840° to 860°C, in terms of uniformity, but againthe deposition rate was low-less than 50 A/min. Hazy films were again theresult of attempts to push the deposition rate up.Results with SiH 2 CI 2 and N2 0 were more favorable.

Here the reactionwas assu med to be:(2)At 900°C and a pressure of 0.8 Torr, good uniformity and clear films wereachieved (see Figure 6) with deposition rates of 120 A/min and wafer spacingof 3/s ".4200SIH CI -N 02 2 24000 1------+---+-----+----+----+---+-----+- (SCC M)(35-350)'€enenw3800Z~03600(33-330)X...N0enI(30-300)3400P -0.8 TORRT - 901-901-913°Ct - 33 MIN.3200~30000816243240485664WAFER POSITION (3/8" SPACING)Further investigation of the nature of these films 4 has shown that thereis about 2.7% CI remaining in the completed film. Upon exposing them to athermal oxidation environment, it was discovered that the interface betweenthe oxide and silicon was etched and film adhesion was lost-the films flakedoff.

Apparently, the thermal oxidation process released bound chlorine inthe oxide which then diffused to the interface where it attacked the silicon.72Chemical Vapor Deposition for MicroelectronicsApparently, the low-pressure CVD process leaves some chlorine in thelayer, while the same process at high pressure does not. Since we do not understand the kinetic pathways for the formation of this film, we cannot predicthow to modify it. However, by trial and error it was discovered that smalladditions of O2 to the N2 0 feed gas reduced the chlorine content to zero.

4Thickness uniformity was impacted by the O 2 addition, but a value of ± 7%was obtainable.3.2.3 Reflow PhenomenaWhen phosphorus is added to Si0 2 , in addition to gettering mobile alkaliions, it tends to reduce the intrinsic tensile stress in such films, thereby reducing their tendency to crack. Both functions are important when the film is usedas a final passivation film for integrated circuits encapsulated in plastic. Phosphorus additions of 7 weight percent seem to be optimum in order to producethe above desirable film characteristics.For interlayer dielectric, another consequence of the addition of phosphorus and/or boron is the ability to "reflow" the glass at lower temperatures.Lowering processing temperatures is a continuing objective in CVD processing.When a dielectric film covers a polysilicon line, or a via is anisotropicallyetched down through an oxide film, we end up with nonplanar surfaces uponwhich one has to attempt to deposit aluminum by sputtering.