ATmega128 (961843), страница 60
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Program Page1. Set BS1 = “0”2. Give WR a negative pulse. This starts programming of the entire page of data.RDY/BSY goes low.3. Wait until RDY/BSY goes high. (See Figure 137 for signal waveforms)I. Repeat B through H until the entire Flash is programmed or until all data has beenprogrammed.J. End Page Programming1. 1. Set XA1, XA0 to “10”. This enables command loading.2. Set DATA to “0000 0000”. This is the command for No Operation.3. Give XTAL1 a positive pulse. This loads the command, and the internal write signals are reset.Figure 136. Addressing the Flash which is Organized in PagesPCMSBPROGRAMCOUNTERPAGEMSBPCPAGEPAGE ADDRESSWITHIN THE FLASHPROGRAM MEMORYPAGEPCWORDWORD ADDRESSWITHIN A PAGEPAGEINSTRUCTION WORDPCWORD[PAGEMSB:0]:000102PAGEENDNote:2961.
PCPAGE and PCWORD are listed in Table 124 on page 293.ATmega1282467M–AVR–11/04ATmega128Figure 137. Programming the Flash WaveformsFDATAABCDE0x10ADDR. LOWDATA LOWDATA HIGHXXBCADDR. LOW DATA LOWDEDATA HIGHXXGADDR. HIGHHXXXA1XA0BS1XTAL1WRRDY/BSYRESET +12VOEPAGELBS2Note:Programming the EEPROM“XX” is don’t care.
The letters refer to the programming description above.The EEPROM is organized in pages, see Table 124 on page 293. When programmingthe EEPROM, the program data is latched into a page buffer. This allows one page ofdata to be programmed simultaneously. The programming algorithm for the EEPROMdata memory is as follows (refer to “Programming the Flash” on page 295 for details onCommand, Address and Data loading):1.
A: Load Command “0001 0001”.2. G: Load Address High Byte ($00 - $FF).3. B: Load Address Low Byte ($00 - $FF).4. C: Load Data ($00 - $FF).5. E: Latch data (give PAGEL a positive pulse).K: Repeat 3 through 5 until the entire buffer is filled.L: Program EEPROM page:1. Set BS1 to “0”.2. Give WR a negative pulse. This starts programming of the EEPROM page.RDY/BSY goes low.3. Wait until to RDY/BSY goes high before programming the next page.(See Figure 138 for signal waveforms.)2972467M–AVR–11/04Figure 138. Programming the EEPROM WaveformsKADATA0x11GBADDR. HIGH ADDR. LOWCEBCDATAXXADDR. LOWDATAELXXXA1XA0BS1XTAL1WRRDY/BSYRESET +12VOEPAGELBS2Reading the FlashThe algorithm for reading the Flash memory is as follows (refer to “Programming theFlash” on page 295 for details on Command and Address loading):1.
A: Load Command “0000 0010”.2. G: Load Address High Byte ($00 - $FF).3. B: Load Address Low Byte ($00 - $FF).4. Set OE to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA.5. Set BS1 to “1”. The Flash word high byte can now be read at DATA.6. Set OE to “1”.Reading the EEPROMThe algorithm for reading the EEPROM memory is as follows (refer to “Programming theFlash” on page 295 for details on Command and Address loading):1. A: Load Command “0000 0011”.2. G: Load Address High Byte ($00 - $FF).3.
B: Load Address Low Byte ($00 - $FF).4. Set OE to “0”, and BS1 to “0”. The EEPROM Data byte can now be read atDATA.5. Set OE to “1”.Programming the Fuse LowBitsThe algorithm for programming the Fuse Low bits is as follows (refer to “Programmingthe Flash” on page 295 for details on Command and Data loading):1. A: Load Command “0100 0000”.2. C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.3. Set BS1 to “0” and BS2 to “0”.4. Give WR a negative pulse and wait for RDY/BSY to go high.298ATmega1282467M–AVR–11/04ATmega128Programming the Fuse HighBitsThe algorithm for programming the Fuse High bits is as follows (refer to “Programmingthe Flash” on page 295 for details on Command and Data loading):1. A: Load Command “0100 0000”.2. C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.3.
Set BS1 to “1” and BS2 to “0”. This selects high data byte.4. Give WR a negative pulse and wait for RDY/BSY to go high.5. Set BS1 to “0”. This selects low data byte.Programming the ExtendedFuse BitsThe algorithm for programming the Extended Fuse bits is as follows (refer to “Programming the Flash” on page 295 for details on Command and Data loading):1. A: Load Command “0100 0000”.2. C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.3. Set BS2 to “1” and BS1 to “0”.
This selects extended data byte.4. Give WR a negative pulse and wait for RDY/BSY to go high.5. Set BS2 to “0”. This selects low data byte.Figure 139. Programming the FusesWrite Fuse Low byteDATAAC$40DATAXXWrite Fuse high byteAC$40DATAXXWrite Extended Fuse byteAC$40DATAXXXA1XA0BS1BS2XTAL1WRRDY/BSYRESET +12VOEPAGELProgramming the Lock BitsThe algorithm for programming the Lock bits is as follows (refer to “Programming theFlash” on page 295 for details on Command and Data loading):1. A: Load Command “0010 0000”.2.
C: Load Data Low Byte. Bit n = “0” programs the Lock bit.3. Give WR a negative pulse and wait for RDY/BSY to go high.The Lock bits can only be cleared by executing Chip Erase.Reading the Fuse and LockBitsThe algorithm for reading the Fuse and Lock bits is as follows (refer to “Programmingthe Flash” on page 295 for details on Command loading):1. A: Load Command “0000 0100”.2. Set OE to “0”, BS2 to “0”, and BS1 to “0”. The status of the Fuse Low bits cannow be read at DATA (“0” means programmed).3. Set OE to “0”, BS2 to “1”, and BS1 to “1”. The status of the Fuse High bits cannow be read at DATA (“0” means programmed).2992467M–AVR–11/044.
Set OE to “0”, BS2 to “1”, and BS1 to “0”. The status of the Extended Fuse bitscan now be read at DATA (“0” means programmed).5. Set OE to “0”, BS2 to “0”, and BS1 to “1”. The status of the Lock bits can now beread at DATA (“0” means programmed).6. Set OE to “1”.Figure 140. Mapping Between BS1, BS2 and the Fuse- and Lock Bits During ReadFuse Low Byte0Extended Fuse byte10DATABS20Lock bits1Fuse high byte1BS1BS2Reading the Signature BytesThe algorithm for reading the Signature bytes is as follows (refer to Programming theFlash for details on Command and Address loading):1.
A: Load Command “0000 1000”.2. B: Load Address Low Byte ($00 - $02).3. Set OE to “0”, and BS1 to “0”. The selected Signature byte can now be read atDATA.4. Set OE to “1”.Reading the Calibration ByteThe algorithm for reading the Calibration byte is as follows (refer to Programming theFlash for details on Command and Address loading):1. A: Load Command “0000 1000”.2. B: Load Address Low Byte.3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.4. Set OE to “1”.300ATmega1282467M–AVR–11/04ATmega128Parallel ProgrammingCharacteristicsFigure 141.
Parallel Programming Timing, Including some General TimingRequirementst XLWLt XHXLXTAL1t DVXHt XLDXData & Contol(DATA, XA0/1, BS1, BS2)t PLBXt BVPHPAGELt BVWLt WLBXt PHPLt WLWRWHt PLWLWLRLRDY/BSYt WLRHFigure 142. Parallel Programming Timing, Loading Sequence with TimingRequirementsLOAD ADDRESS(LOW BYTE)LOAD DATA LOAD DATA(HIGH BYTE)LOAD DATA(LOW BYTE)t XLXHtXLPHLOAD ADDRESS(LOW BYTE)tPLXHXTAL1BS1PAGELDATAADDR0 (Low Byte)DATA (Low Byte)DATA (High Byte)ADDR1 (Low Byte)XA0XA1Note:The timing requirements shown in Figure 141 (i.e. tDVXH, tXHXL, and tXLDX) also apply toloading operation.3012467M–AVR–11/04Figure 143. Parallel Programming Timing, Reading Sequence (Within the Same Page)with Timing RequirementsLOAD ADDRESS(LOW BYTE)READ DATA(LOW BYTE)READ DATA(HIGH BYTE)LOAD ADDRESS(LOW BYTE)tXLOLXTAL1tBHDVBS1tOLDVOEtOHDZDATAADDR0 (Low Byte)DATA (Low Byte)ADDR1 (Low Byte)DATA (High Byte)XA0XA1Note:The timing requirements shown in Figure 141 (i.e.
tDVXH, tXHXL, and tXLDX) also apply toreading operation.Table 126. Parallel Programming Characteristics, VCC = 5 V ± 10%302SymbolParameterMinVPPProgramming Enable Voltage11.5IPPProgramming Enable CurrenttDVXHData and Control Valid before XTAL1 High67nstXLXHXTAL1 Low to XTAL1 High200nstXHXLXTAL1 Pulse Width High150nstXLDXData and Control Hold after XTAL1 Low67nstXLWLXTAL1 Low to WR Low0nstXLPHXTAL1 Low to PAGEL high0nstPLXHPAGEL low to XTAL1 high150nstBVPHBS1 Valid before PAGEL High67nstPHPLPAGEL Pulse Width High150nstPLBXBS1 Hold after PAGEL Low67nstWLBXBS2/1 Hold after WR Low67nstPLWLPAGEL Low to WR Low67nstBVWLBS1 Valid to WR Low67nstWLWHWR Pulse Width Low150nstWLRLWR Low to RDY/BSY Low(1)TypMaxUnits12.5V250µA01µstWLRHWR Low to RDY/BSY High3.75mstWLRH_CEWR Low to RDY/BSY High for Chip Erase(2)7.510mstXLOLXTAL1 Low to OE Low0nsATmega1282467M–AVR–11/04ATmega128Table 126.
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