ATmega128 (961843), страница 59
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The default value of SUT1..0 results in maximum start-up time. See Table 14 on page39 for details.2. The default setting of CKSEL3..0 results in Internal RC Oscillator @ 1 MHz. SeeTable 6 on page 35 for details.The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits arelocked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming theLock bits.290ATmega1282467M–AVR–11/04ATmega128Latching of FusesThe Fuse values are latched when the device enters Programming mode and changesof the fuse values will have no effect until the part leaves Programming mode.
This doesnot apply to the EESAVE fuse which will take effect once it is programmed. The fusesare also latched on power-up in normal mode.Signature BytesAll Atmel microcontrollers have a three-byte signature code which identifies the device.This code can be read in both serial and parallel mode, also when the device is locked.The three bytes reside in a separate address space.For the ATmega128 the signature bytes are:1.
$000: $1E (indicates manufactured by Atmel)2. $001: $97 (indicates 128KB Flash memory)3. $002: $02 (indicates ATmega128 device when $001 is $97)Calibration ByteThe ATmega128 stores four different calibration values for the internal RC Oscillator.These bytes resides in the signature row high byte of the addresses 0x000, 0x0001,0x0002, and 0x0003 for 1, 2, 4, and 8 MHz respectively. During Reset, the 1 MHz valueis automatically loaded into the OSCCAL Register. If other frequencies are used, thecalibration value has to be loaded manually, see “Oscillator Calibration Register – OSCCAL” on page 39 for details.2912467M–AVR–11/04Parallel ProgrammingParameters, PinMapping, andCommandsThis section describes how to parallel program and verify Flash Program memory,EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATmega128.
Pulsesare assumed to be at least 250 ns unless otherwise noted.Signal NamesIn this section, some pins of the ATmega128 are referenced by signal names describingtheir functionality during parallel programming, see Figure 135 and Table 120. Pins notdescribed in the following table are referenced by pin names.The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit coding is shown in Table 122.When pulsing WR or OE, the command loaded determines the action executed. The different Commands are shown in Table 123.Figure 135. Parallel Programming+5VRDY/BSYPD1OEPD2WRPD3BS1PD4XA0PD5XA1PD6PAGELPD7+12 VVCC+5VAVCCPB7 - PB0DATARESETBS2PA0XTAL1GNDTable 120. Pin Name MappingSignal Name inProgramming ModePin NameI/OFunctionPD1O0: Device is busy programming, 1: Device is readyfor new commandOEPD2IOutput Enable (Active low)WRPD3IWrite Pulse (Active low)PD4IByte Select 1 (“0” selects low byte, “1” selects highbyte)XA0PD5IXTAL Action Bit 0XA1PD6IXTAL Action Bit 1RDY/BSYBS1292ATmega1282467M–AVR–11/04ATmega128Table 120.
Pin Name Mapping (Continued)Signal Name inProgramming ModePAGELBS2DATAPin NameI/OFunctionPD7IProgram Memory and EEPROM data Page LoadPA0IByte Select 2 (“0” selects low byte, “1” selects 2’ndhigh byte)PB7-0I/OBi-directional Data bus (Output when OE is low)Table 121. Pin Values Used to Enter Programming ModePinSymbolValuePAGELProg_enable[3]0XA1Prog_enable[2]0XA0Prog_enable[1]0BS1Prog_enable[0]0Table 122. XA1 and XA0 CodingXA1XA0Action when XTAL1 is Pulsed00Load Flash or EEPROM Address (High or low address byte determined by BS1)01Load Data (High or Low data byte for Flash determined by BS1)10Load Command11No Action, IdleTable 123.
Command Byte Bit CodingCommand ByteCommand Executed1000 0000Chip Erase0100 0000Write Fuse bits0010 0000Write Lock bits0001 0000Write Flash0001 0001Write EEPROM0000 1000Read Signature Bytes and Calibration byte0000 0100Read Fuse and Lock bits0000 0010Read Flash0000 0011Read EEPROMTable 124. No. of Words in a Page and no. of Pages in the FlashFlash SizePage SizePCWORDNo. of PagesPCPAGEPCMSB64K words (128K bytes)128 wordsPC[6:0]512PC[15:7]152932467M–AVR–11/04Table 125. No. of Words in a Page and no.
of Pages in the EEPROMEEPROM SizePage SizePCWORDNo. of PagesPCPAGEEEAMSB4K bytes8 bytesEEA[2:0]512EEA[11:3]8Parallel ProgrammingEnter Programming ModeThe following algorithm puts the device in parallel programming mode:1. Apply 4.5 - 5.5 V between VCC and GND, and wait at least 100 µs.2. Set RESET to “0” and toggle XTAL1 at least SIX times.3. Set the Prog_enable pins listed in Table 121 on page 293 to “0000” and wait atleast 100 ns.4.
Apply 11.5 - 12.5V to RESET. Any activity on Prog_enable pins within 100 nsafter +12V has been applied to RESET, will cause the device to fail entering programming mode.Note, if External Crystal or External RC configuration is selected, it may not be possibleto apply qualified XTAL1 pulses. In such cases, the following algorithm should befollowed:1. Set Prog_enable pins listed in Table on page 293 to “0000”.2.
Apply 4.5 - 5.5V between VCC and GND simultaneously as 11.5 - 12.5V isapplied to RESET.3. Wait 100 µs.4. Re-program the fuses to ensure that External Clock is selected as clock source(CKSEL3:0 = 0b0000) If Lock bits are programmed, a Chip Erase commandmust be executed before changing the fuses.5. Exit Programming mode by power the device down or by bringing RESET pin to0b0.6. Entering Programming mode with the original algorithm, as described above.Considerations for EfficientProgrammingChip EraseThe loaded command and address are retained in the device during programming.
Forefficient programming, the following should be considered.•The command needs only be loaded once when writing or reading multiple memorylocations.•Skip writing the data value $FF, that is the contents of the entire EEPROM (unlessthe EESAVE fuse is programmed) and Flash after a Chip Erase.•Address high byte needs only be loaded before programming or reading a new 256word window in Flash or 256-byte EEPROM. This consideration also applies toSignature bytes reading.The Chip Erase will erase the Flash and EEPROM(1) memories plus Lock bits. The Lockbits are not reset until the program memory has been completely erased. The Fuse bitsare not changed.
A Chip Erase must be performed before the Flash and/or theEEPROM are reprogrammed.Note:1. The EEPRPOM memory is preserved during chip erase if the EESAVE fuse isprogrammed.Load Command “Chip Erase”294ATmega1282467M–AVR–11/04ATmega1281. Set XA1, XA0 to “10”. This enables command loading.2. Set BS1 to “0”.3. Set DATA to “1000 0000”. This is the command for Chip Erase.4.
Give XTAL1 a positive pulse. This loads the command.5. Give WR a negative pulse. This starts the Chip Erase. RDY/BSY goes low.6. Wait until RDY/BSY goes high before loading a new command.Programming the FlashThe Flash is organized in pages, see Table 123 on page 293. When programming theFlash, the program data is latched into a page buffer. This allows one page of programdata to be programmed simultaneously. The following procedure describes how to program the entire Flash memory:A. Load Command “Write Flash”1. Set XA1, XA0 to “10”.
This enables command loading.2. Set BS1 to “0”.3. Set DATA to “0001 0000”. This is the command for Write Flash.4. Give XTAL1 a positive pulse. This loads the command.B. Load Address Low byte1. Set XA1, XA0 to “00”. This enables address loading.2. Set BS1 to “0”.
This selects low address.3. Set DATA = Address low byte ($00 - $FF).4. Give XTAL1 a positive pulse. This loads the address low byte.C. Load Data Low Byte1. Set XA1, XA0 to “01”. This enables data loading.2. Set DATA = Data low byte ($00 - $FF).3. Give XTAL1 a positive pulse.
This loads the data byte.D. Load Data High Byte1. Set BS1 to “1”. This selects high data byte.2. Set XA1, XA0 to “01”. This enables data loading.3. Set DATA = Data high byte ($00 - $FF).4. Give XTAL1 a positive pulse. This loads the data byte.E. Latch Data1. Set BS1 to “1”. This selects high data byte.2. Give PAGEL a positive pulse. This latches the data bytes.
(See Figure 137 forsignal waveforms)F. Repeat B through E until the entire buffer is filled or until all data within the page isloaded.While the lower bits in the address are mapped to words within the page, the higher bitsaddress the pages within the FLASH. This is illustrated in Figure 136 on page 296. Notethat if less than 8 bits are required to address words in the page (pagesize < 256), themost significant bit(s) in the address low byte are used to address the page when performing a page write.G.
Load Address High byte1. Set XA1, XA0 to “00”. This enables address loading.2. Set BS1 to “1”. This selects high address.2952467M–AVR–11/043. Set DATA = Address high byte ($00 - $FF).4. Give XTAL1 a positive pulse. This loads the address high byte.H.
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