ATmega8 (961730), страница 49
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Although each I/O port can source more than the test conditions (20mA at Vcc = 5V, 10mA at Vcc = 3V) under steady stateconditions (non-transient), the following must be observed:PDIP Package:1] The sum of all IOH, for all ports, should not exceed 400 mA.2] The sum of all IOH, for port C0 - C5, should not exceed 100 mA.3] The sum of all IOH, for ports B0 - B7, C6, D0 - D7 and XTAL2, should not exceed 100 mA.TQFP and MLF Package:1] The sum of all IOH, for all ports, should not exceed 400 mA.2] The sum of all IOH, for ports C0 - C5, should not exceed 200 mA.3] The sum of all IOH, for ports C6, D0 - D4, should not exceed 300 mA.4] The sum of all IOH, for ports B0 - B7, D5 - D7, should not exceed 300 mA.If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source currentgreater than the listed test condition.5.
Minimum VCC for Power-down is 2.5V.ATmega8(L)2486O–AVR–10/04ATmega8(L)External Clock DriveWaveformsFigure 114. External Clock Drive WaveformsV IH1V IL1External Clock DriveTable 99. External Clock DriveVCC = 2.7V to 5.5VVCC = 4.5V to 5.5VMinMaxMinMaxUnits08016MHzSymbolParameter1/tCLCLOscillator FrequencytCLCLClock Period12562.5nstCHCXHigh Time5025nstCLCXLow Time5025nstCLCHRise Time1.60.5µstCHCLFall Time1.60.5µs∆tCLCLChange in period from oneclock cycle to the next22%Table 100. External RC Oscillator, Typical FrequenciesNotes:R [kΩ](1)C [pF]f(2)3322650 kHz10222.0 MHz1. R should be in the range 3 kΩ - 100 kΩ, and C should be at least 20 pF. The C valuesgiven in the table includes pin capacitance. This will vary with package type.2. The frequency will vary with package type and board layout.2412486O–AVR–10/04Two-wire Serial Interface CharacteristicsTable 101 describes the requirements for devices connected to the Two-wire Serial Bus.
The ATmega8 Two-wire SerialInterface meets or exceeds these requirements under the noted conditions.Timing symbols refer to Figure 115.Table 101. Two-wire Serial Bus RequirementsSymbolParameterVILVIHVhys(1)MinMaxUnitsInput Low-voltage-0.50.3 VCCVInput High-voltage0.7 VCCVCC + 0.5V–VHysteresis of Schmitt Trigger InputsVOL(1)Output Low-voltagetr(1)Rise Time for both SDA and SCLtof(1)Output Fall Time from VIHmin to VILmaxtSP(1)Spikes Suppressed by Input FilterIiInput Current each I/O PinCi(1)Capacitance for each I/O PinfSCLSCL Clock FrequencyRpHold Time (repeated) START ConditiontLOWLow Period of the SCL ClocktHIGHHigh period of the SCL clocktSU;STASet-up time for a repeated START conditiontHD;DATData hold timetSU;DATData setup timetSU;STOSetup time for STOP conditiontBUFBus free time between a STOP and STARTcondition2420.05 VCC3 mA sink current10 pF < Cb < 400 pF(3)1.2.3.4.(2)00.4V(3)(2)300ns20 + 0.1Cb(3)(2)250ns(2)ns20 + 0.1Cb00.1VCC < Vi < 0.9VCC50-1010µA–10pFfCK(4) > max(16fSCL, 250kHz)(5)0400kHzfSCL ≤ 100 kHzV CC – 0,4V---------------------------3mA1000ns------------------CbΩfSCL > 100 kHzV CC – 0,4V---------------------------3mA300ns---------------CbΩfSCL ≤ 100 kHz4.0–µsfSCL > 100 kHzValue of Pull-up resistortHD;STANotes:Condition0.6–µs(6)4.7–µsfSCL > 100 kHz(7)1.3–µsfSCL ≤ 100 kHz4.0–µsfSCL > 100 kHz0.6–µsfSCL ≤ 100 kHz4.7–µsfSCL > 100 kHz0.6–µsfSCL ≤ 100 kHz03.45µsfSCL > 100 kHz00.9µsfSCL ≤ 100 kHz250–nsfSCL > 100 kHz100–nsfSCL ≤ 100 kHz4.0–µsfSCL > 100 kHz0.6–µsfSCL ≤ 100 kHz4.7–µsfSCL > 100 kHz1.3–µsfSCL ≤ 100 kHzIn ATmega8, this parameter is characterized and not 100% tested.Required only for fSCL > 100 kHz.Cb = capacitance of one bus line in pF.fCK = CPU clock frequencyATmega8(L)2486O–AVR–10/04ATmega8(L)5.
This requirement applies to all ATmega8 Two-wire Serial Interface operation. Otherdevices connected to the Two-wire Serial Bus need only obey the general fSCLrequirement.6. The actual low period generated by the ATmega8 Two-wire Serial Interface is (1/fSCL 2/fCK), thus fCK must be greater than 6 MHz for the low time requirement to be strictlymet at fSCL = 100 kHz.7.
The actual low period generated by the ATmega8 Two-wire Serial Interface is (1/fSCL 2/fCK), thus the low time requirement will not be strictly met for fSCL > 308 kHz whenfCK = 8 MHz. Still, ATmega8 devices connected to the bus may communicate at fullspeed (400 kHz) with other ATmega8 devices, as well as any other device with aproper tLOW acceptance margin.Figure 115. Two-wire Serial Bus TimingtoftHIGHtLOWtrtLOWSCLtSU;STAtHD;STAtHD;DATtSU;DATtSU;STOSDAtBUFSPI TimingCharacteristicsSee Figure 116 and Figure 117 for details.Table 102. SPI Timing ParametersDescriptionMode1SCK periodMasterSee Table 502SCK high/lowMaster50% duty cycle3Rise/Fall timeMaster3.64SetupMaster105HoldMaster106Out to SCKMaster0.5 • tSCK7SCK to outMaster108SCK to out highMaster109SS low to outSlave1510SCK periodSlave4 • tck11SCK high/low(1)Slave2 • tck12Rise/Fall timeSlave13SetupSlave1014HoldSlave1015SCK to outSlave16SCK to SS highSlave17SS high to tri-stateSlave18SS low to SCKSalveNote:MinTypMaxns1.61520102 • tck1.
In SPI Programming mode the minimum SCK high/low period is:- 2tCLCL for fCK < 12 MHz- 3tCLCL for fCK > 12 MHz2432486O–AVR–10/04Figure 116. SPI interface timing requirements (Master Mode)SS61SCK(CPOL = 0)22SCK(CPOL = 1)4MISO(Data Input)53MSB...LSB7MOSI(Data Output)MSB8...LSBFigure 117. SPI interface timing requirements (Slave Mode)18SS10916SCK(CPOL = 0)1111SCK(CPOL = 1)13MOSI(Data Input)1412MSB...LSB15MISO(Data Output)244MSB17...LSBXATmega8(L)2486O–AVR–10/04ATmega8(L)ADC CharacteristicsTable 103.
ADC CharacteristicsSymbolMax(1)ResolutionSingle Ended Conversion10BitsSingle Ended ConversionVREF = 4V, VCC = 4VADC clock = 200 kHz1.75LSBSingle Ended ConversionVREF = 4V, VCC = 4VADC clock = 1 MHz3LSBIntegral Non-linearity (INL)Single Ended ConversionVREF = 4V, VCC = 4VADC clock = 200 kHz0.75LSBDifferential Non-linearity(DNL)Single Ended ConversionVREF = 4V, VCC = 4VADC clock = 200 kHz0.5LSBUnitsGain ErrorSingle Ended ConversionVREF = 4V, VCC = 4VADC clock = 200 kHz1LSBOffset ErrorSingle Ended ConversionVREF = 4V, VCC = 4VADC clock = 200 kHz1LSBConversion TimeFree Running ConversionClock FrequencyAVCCAnalog Supply VoltageVREFReference VoltageInput voltage13260µs501000kHzVCC - 0.3(2)VCC + 0.3(3)V2.0AVCCVGNDVREFVInput bandwidthVINTInternal Voltage ReferenceRREFReference Input ResistanceRAINAnalog Input ResistanceNotes:Typ(1)ConditionAbsolute accuracy(Including INL, DNL,Quantization Error, Gain,and Offset Error)VINMin(1)Parameter38.52.3552.56kHz2.7V32kΩ100MΩ1.
Values are guidelines only.2. Minimum for AVCC is 2.7V.3. Maximum for AVCC is 5.5V.2452486O–AVR–10/04ATmega8 TypicalCharacteristicsThe following charts show typical behavior. These figures are not tested during manufacturing. All current consumption measurements are performed with all I/O pinsconfigured as inputs and with internal pull-ups enabled. A sine wave generator with Railto-Rail output is used as clock source.The power consumption in Power-down mode is independent of clock selection.The current consumption is a function of several factors such as: operating voltage,operating frequency, loading of I/O pins, switching rate of I/O pins, code executed andambient temperature.
The dominating factors are operating voltage and frequency.The current drawn from capacitive loaded pins may be estimated (for one pin) asCL*VCC*f where CL = load capacitance, VCC = operating voltage and f = average switching frequency of I/O pin.The parts are characterized at frequencies higher than test limits. Parts are not guaranteed to function properly at frequencies higher than the ordering code indicates.The difference between current consumption in Power-down mode with WatchdogTimer enabled and Power-down mode with Watchdog Timer disabled represents the differential current drawn by the Watchdog Timer.Active Supply CurrentFigure 118.
Active Supply Current vs. Frequency (0.1 - 1.0 MHz)ACTIVE SUPPLY CURRENT vs. FREQUENCY0.1 - 1.0 MHz35.5V5.0V4.5V4.0V3.3V3.0V2.7V2.5ICC (mA)21.510.5000.10.20.30.40.50.60.70.80.91Frequency (MHz)246ATmega8(L)2486O–AVR–10/04ATmega8(L)Figure 119. Active Supply Current vs. Frequency (1 - 20 MHz)ACTIVE SUPPLY CURRENT vs. FREQUENCY1 - 20 MHz305.5V5.0V254.5VICC (mA)2015103.3V3.0V52.7V002468101214161820Frequency (MHz)Figure 120. Active Supply Current vs. VCC (Internal RC Oscillator, 8 MHz)ACTIVE SUPPLY CURRENT vs. VCCINTERNAL RC OSCILLATOR, 8 MHz1816-40°C25°C85°C14ICC (mA)1210864202.533.544.555.5VCC (V)2472486O–AVR–10/04Figure 121.
Active Supply Current vs. VCC (Internal RC Oscillator, 4 MHz)ACTIVE SUPPLY CURRENT vs. VCCINTERNAL RC OSCILLATOR, 4 MHz1210-40°C25°C85°CICC (mA)864202.533.544.555.5VCC (V)Figure 122. Active Supply Current vs. VCC (Internal RC Oscillator, 2 MHz)ACTIVE SUPPLY CURRENT vs. VCCINTERNAL RC OSCILLATOR, 2 MHz625°C-40°C85°C5ICC (mA)432102.533.544.555.5VCC (V)248ATmega8(L)2486O–AVR–10/04ATmega8(L)Figure 123.
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