European GNSS (Galileo) open service (797926), страница 6
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11 below, withthe binary signal components eE1-B(t) and eE1-C(t). Note that as for E6, both pilot and datacomponents are modulated onto the same carrier component, with a power sharing of50 percent.( )( )))Eq. 111011β=and111suα=ltaAFCoTnThe parameters α and β are chosen such that the combined power of the scE1-B,b and thescE1-C,b sub carrier components equals 1/11 of the total power of eE1-B plus eE1-C, beforeapplication of any bandwidth limitation. This yields:One period of the sub-carrier function α scE1-B,a (t) + β scE1-B,b (t) for the E1-B signalcomponent and one period of the sub-carrier function α scE1-C,a (t) − β scE1-C,b (t) for theE1-C signal component are shown in the following figureb)DRa)α+β1α-β0ub-α+β-1-α-βα-βlic0α+β11/61/210-α+β-1-α-β01/6t/Tc,E1-B1t/Tc,E1-COne period of the CBOC sub-carrier for a) the E1-B signal component, and b) the E1-Csignal componentrPFigure 8.1/22.4.
Logic LevelsFoThe correspondence between the logic level code bits used to modulate the signal and thesignal level is according to the values stated in Table 10.Logic LevelSignal Level1-1.00+1.0Table 10. Logic to Signal Level Assignment© European Union 2014Document subject to terms of use and disclaimers p. i-iiOS SIS ICD, Issue 1.2, dd.mm 201492.5.
Transmitted Signal Phase NoiseThe phase noise spectral density of the un-modulated carrier will allow a second-orderphase locked loop with 10 Hz one-sided noise bandwidth to track the carrier to an accuracyof 0.04 radians RMS.2.6. Transmitted Signals Code/Data CoherencytionThe edge of each data symbol coincides with the edge of a code chip. Periodic spreadingcodes start coincides with the start of a data symbol.The edge of each secondary code chip coincides with the edge of a primary code chip.Primary code start coincides with the start of a secondary code chip.2.7.
Received Power Levels on GroundltaAFCoTn2.7.1. Minimum LevelssuThe Galileo satellites will provide Galileo E5, E6 and E1 signals strength in order to meetthe minimum levels specified in Table 11. The minimum received power on ground ismeasured at the output of an ideally matched RHCP 0 dBi polarized user receiving antennawhen the SV elevation angle is higher than 10 degrees.Signal ComponentTotal ReceivedMinimum Power (dBW)E5a (total I+Q)(50/50% I/Q power sharing)-155E5b (total I+Q)(50/50% I/Q power sharing)-155E6E6-B/C (total B+C)(50/50% E6-B/E6-C power sharing)-155E1E1-B/C (total B+C)(50/50% E1-B/E1-C power sharing)-157DRSignallicE5ubTable 11.
Received Minimum Power Levels on GroundFor a 5 degree user elevation angle, the user minimum received power will typically be0.25 dB lower than specified in Table 11 above.rP2.7.2. Maximum LevelsFoThe Galileo terrestrial user’s maximum received signal power level is, using the sameassumptions as for the minimum received power, not expected to exceed 3 dB above thecorresponding minimum received power.For purposes of establishing user receiver dynamic range for receiver design and test,the maximum received signal power level is not expected to exceed 7 dB above thecorresponding minimum received power.2.8. Payload and Component Reception LossesThe correlation loss due to payload distortions will be below 0.6 dB.For the reference receiver bandwidths defined in section 2.1.3, additional losses due toreceiver filtering are to be considered, as shown in Table 12.10© European Union 2014Document subject to terms of use and disclaimers p.
i-iiOS SIS ICD, Issue 1.2, ?????????? 2014SignalLoss (dB)E10.1E60.0E50.4E5a0.6E5b0.6tionForPublicDRsultaAFCoTnTable 12. Additional Losses due to Receiver Filtering© European Union 2014Document subject to terms of use and disclaimers p. i-iiOS SIS ICD, Issue 1.2, dd.mm 2014113. Galileo Spreading Codes Characteristics3.1. Code LengthsTiered Code Period(ms)Code Length (chips)Primary20E5a-Q100E5b-I4E5b-Q100E1-B4E1-C100102302010230100102304102301004092N/A409225suE5a-ISecondaryltaAFCoTnSignal ComponenttionThe ranging codes are built from so-called primary and secondary codes by using a tieredcodes construction described in paragraph 3.2. The code lengths to be used for each signalcomponent are stated in Table 13. Note that the E6 ranging codes are not subject of thisSIS ICD.DRTable 13. Code Lengths3.2.
Tiered Codes GenerationForPublicLong spreading codes are generated by a tiered code construction, whereby a secondarycode sequence is used to modify successive repetitions of a primary code, as shown inFigure 9 for a primary code of length N and chip rate fc, and a secondary code of length NSand chip rate fcs = fc/N. The duration of N chips is also called a primary code epoch in Figure9. In logical representation, the secondary code chips are sequentially exclusive-ored withthe primary code, always one chip of the secondary code per period of the primary code.÷NsClockClock rate ƒcƒcsSecondaryCodeƒcPrimaryCodeFigure 9.12Tiered Codes Generation© European Union 2014Document subject to terms of use and disclaimers p. i-iiOS SIS ICD, Issue 1.2, ?????????? 2014TieredRangingCode3.3.
Primary Codes GenerationThe primary spreading codes can be either●● Linear feedback shift register-based pseudo-noise sequences, or●● Optimized pseudo-noise sequencestionOptimized codes need to be stored in memory and therefore are often called ‘memorycodes’. Register based codes used in Galileo are generated as combinations of twoM-sequences, being truncated to the appropriate length. These codes can be generatedeither with pairs of LFSR or might be also stored in memory.ci,j, si,j,ai,j ∈{0,1}a1,1a1,3a1,4FeedbackTapsa1,3a1,R = 1a1,4c1,1c1,2c1,3c1,4c1,R-2 c1,R-1c1,RBaseregister 1s1,1s1,2s1,3s1,4s1,R-2s1,RBaseregister 1(Phase 1)DRClock (Chip rate)a1,2sultaAFCoTnFigure 10 shows an example standard implementation of the LFSR method for thegeneration of truncated and combined M sequences.
Two parallel shift registers are used:base register 1 and base register 2. The primary code output sequence is the exclusiveOR of base register 1 and 2 output sequences, the shift between these two sequences iszero. Each shift register i (i=1 for base register 1 and i = 2 base register 2) of length R isfed back with a particular set of feedback taps {ai,j}j=1…R = [ai,1,ai,2,…,ai,R] and its content isrepresented by a vector {ci,j}j=1…R = [ci,1,ci,2,…,ci,R]. For truncation to primary code length N,the content of the two shift registers is reinitialised (reset) after N cycles with the so-calledstart-values {si,j}j=1…R = [si,1,si,2,…,si,R].Presetload 1licPresetcontrols2,1Presetload 2ubPresetcontrols2,2c2,1MultiplierrPa2,1c2,2a2,2s1,R-1Outputs2,3s2,4s2,R-2s2,R-1s2,RBaseregister 2(Phase 2)c2,3c2,4c2,R-2 c2,R-1c2,RBaseregister 2a2,3a2,4FeedbackTapsa2,R-2a2,R-1a2,R = 1XORFoFigure 10.
LFSR Based Code Generator for Truncated and Combined M‑sequences3.4. Primary Codes Definition3.4.1. E5 Primary CodesThe E5a-I, E5a-Q, E5b-I and E5b-Q primary codes are generated via LFSR, using theprinciple defined in paragraph 3.3, and the parameters defined in Table 14. Note that eachset of codes for each signal component comprises 50 members.© European Union 2014Document subject to terms of use and disclaimers p. i-iiOS SIS ICD, Issue 1.2, dd.mm 201413ComponentFeedback Taps (octal)Shift Register Length(polynomial order)Register 1Register 2E5a-I144050350661E5a-Q144050350661E5b-I146402151445E5b-Q146402143143tionTable 14. E5 Primary Codes SpecificationsDRsultaAFCoTnThe transformation between the octal notation and the vector description {ai,j} for thefeedback tap positions is defined as follows and is illustrated with an example (Register 1for E5a-I in Table 14) in Figure 11.
After transferring the octal vector notation into binarynotation, the bits are counted right to left starting with j = 0 from the LSB and endingwith j = R at the MSB, where R is the code register length. Then the jth bit applies for thefeedback tap ai,j for j = 1, …, R, as shown in Figure 10. Note: ai,R is always one and ai,0 is notconsidered in the register feedback tap.Figure 11. Code Register Feedback Taps Representation (example for E5a-I)ForPublicThe start values for all base register 1 cells, in logic level notation, are ‘1’ for all codesof E5a-I, E5a-Q, E5b-I and E5b-Q.
The start values of base register 2 are provided inthe subsequent sections. The transformation between the octal notation and the vectordescription {si,j} for the register start values is defined as follows and is illustrated withan example in Figure 12 (code number 1 of E5a-I in Table 15).
After transferring the octalnotation in binary notation, the bits are counted right to left starting with j=1 (Note: thedifferent start value compared to the feedback taps definition) from the LSB and endingwith j=R at the MSB, where R is the code register length. Then the jth bit applies to the startvalue si,j for j = 1, …, R, as shown in Figure 10. Note: in this example the MSB is zero in orderto complete the 14-bits binary value sequence to fit into a sequence of octal symbols.Figure 12. Start Value Representation for Base Register 2 (first code of E5a‑I)3.4.1.1. Base Register 2 Start Value for E5a-IThe octal format base register 2 start value with the convention defined in paragraph3.4.1 is as defined in Table 15 for each primary E5a-I code.
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