Wiley.Symbian.OS.Internals.Real.time.Kernel.Programming.Dec.2005.eBook-DDU (779891), страница 46
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For example the ARMprocessor will disable all interrupts, enter supervisor mode and fetch thefirst instruction to be executed from physical address 0.Most processors do not save any information about the program thatwas executing when the reset happened – all of the processor’s state iswiped clean.
However, on some processors, this is not the case – theprocessor only initializes enough state to allow it to deterministicallyexecute a boot sequence.Resets may be caused by hardware, for example when power is firstapplied to the system, or by software, for example when an unrecoverableerror is detected.6.1.3AbortsAn abort is an exception that occurs because of an unrecoverable error.The processor may save some information relating to previous programEXCEPTION TYPES209execution, but this can only be used for diagnostic purposes and doesnot allow the kernel to recover the situation and continue execution ofthe program.Aborts occur if the programmer accesses nonexistent or unmappedmemory. They also occur when there is inconsistent processor state dueto a system programming error. An example of this happens on an IA32 processor if the programmer loads the ring 0 stack pointer with aninvalid address.
Any attempt to use the stack would then cause a stackfault exception. However, the processing of this exception requires thatinformation be pushed onto the ring 0 stack, which is invalid. This is asystem programming error.1Depending on the nature of the error, an abort may be handled by theprocessor as a reset or it may be handled in software.
Aborts due to incorrect physical addresses will be handled in software, since it is possible thatthe fault could be localized to a single program. However aborts due toinconsistent processor state, such as the example given, cannot be recovered by software and so are handled as a reset. In fact IA-32 processorswill halt in the case of the stack fault example given and external logic willthen reset the system. If the abort is handled in software, then the operating system may deal with it either by terminating the currently runningprogram or by triggering a software reset of the system. Symbian OS dealswith aborts by terminating the current thread of execution if it is a userthread or by rebooting the system if the abort occurs in kernel-side code.6.1.4 FaultsA fault is an exception that occurs during instruction execution, signifyingan error that may be recoverable – unlike an abort.
The operating systemcan attempt to rectify the cause of the fault and then retry the instruction.An example of this is a page fault. Suppose an instruction referencesa virtual memory address that is not currently mapped to any physicalmemory page. An operating system that supports demand paging (any ofthe common desktop operating systems) will first check that the virtualaddress accessed is valid; if it is, it will load the page containing theaddress referenced from backing store, and then retry the instruction.6.1.5 TrapsA trap is an exception that replaces execution of a particular instruction.The usual recovery action ends with program execution resuming at theinstruction after the one that caused the trap.1Another example can occur on processors such as the Motorola MCore M340 and theRenesas SuperH, on which there are dedicated registers for handling exceptions.
Wheneveran exception occurs, the processor flags these registers as in use and disables interrupts. Thesystem software must mark the registers as free after saving them and can only re-enableinterrupts after this. If another exception occurs while the registers are still marked as in use,the processor treats this as an abort, because of the inconsistent processor state.210INTERRUPTS AND EXCEPTIONSAn example of this is an undefined instruction. This can be used toaid the emulation of coprocessors or other hardware blocks that are notphysically present in the device. The instructions that normally access thecoprocessor or hardware will be treated as undefined instructions andcause an exception; the exception handler emulates the missing hardwareand then program execution resumes after the trapped instruction.6.1.6 Programmed exceptionsProgrammed exceptions result from the execution of specific instructions whose sole purpose is to cause an exception.
These are of greatimportance to the functioning of an operating system. On a processorwith multiple privilege levels, application code usually runs at the lowestprivilege level, and the kernel of the operating system runs at the highestprivilege level. How then can an application call the operating systemto perform some task for it? The application cannot execute kernel codeusing a standard call mechanism – instead it must cause an exception,which executes at the highest privilege level.
Programmed exceptions arethe means by which application code gains access to operating systemfunctionality, and for this reason they are also known as system calls.When a system call is made, a call number is supplied – either aspart of the instruction opcode that causes the exception (for example theARM SWI instruction has 24 bits available for this), or in a register. Theexception handler uses this to index into the kernel’s system call tableto locate the address of the required kernel function. Enough processorregisters will be saved to make the system call appear as a standardC function call, although this register saving may be split between thekernel-side exception handler and a user-side shim2 which contains theprogrammed exception instruction. For more details, please turn back toChapter 5, Kernel Services.6.2 Exceptions on real hardwareIn the following sections, I describe in detail the types of exception thatcan occur on real hardware, and how they are handled on the ARM andIntel IA-32 (also known as X86) processor architectures.6.2.1ARMThe ARM architecture uses banked registers and a fixed-size, fixedaddress vector table to deal with exceptions.
In ARM terminology, thereare seven execution modes:2A shim is a small section of code which simply passes control to another piece of codewithout doing any work itself other than possibly some rearrangement of parameters.EXCEPTIONS ON REAL HARDWARE2111. User (usr). This is the only non-privileged mode – that is, certaininstructions cannot be executed in user mode, and the MMU willblock access to memory regions which are set up for privilegedaccess only.
User mode is entered explicitly by executing any of theinstructions that write to the mode bits of the CPSR. Once the CPU isexecuting in user mode, only an exception can cause a transition toanother mode. Under Symbian OS the majority of code (everythingother than the kernel, device drivers and board support packagecode) executes in user mode.2. System (sys). This is the only privileged mode that is not entered byan exception.
It can only be entered by executing an instruction thatexplicitly writes to the mode bits of the CPSR. It is exited either bywriting to the mode bits of the CPSR or by an exception. Symbian OSdoes not use system mode.3. Supervisor (svc). This is a privileged mode entered whenever theCPU is reset or when a SWI instruction is executed. It is exited eitherby writing to the mode bits of the CPSR or by an exception other thanreset or SWI. With the exception of interrupt service routines andmost of the exception preambles, all Symbian OS kernel-side codeexecutes in supervisor mode.4.
Abort (abt). This is a privileged mode that is entered whenever aprefetch abort or data abort exception occurs. Symbian OS makesonly minimal use of this mode – the exception preamble switches tosupervisor mode after saving a small number of registers.5. Undefined (und). This is a privileged mode that is entered wheneveran undefined instruction exception occurs. Symbian OS makes onlyminimal use of this mode – the exception preamble switches tosupervisor mode after saving a small number of registers.6. Interrupt (irq).
This is a privileged mode that is entered wheneverthe processor accepts an IRQ interrupt. Under Symbian OS, serviceroutines for IRQ interrupts execute in this mode, unless nestedIRQs are supported. IRQ mode is exited either by writing to theCPSR, for example when returning from the interrupt, or if anotherexception occurs, for example an FIQ interrupt preempting the IRQservice routine.7. Fast Interrupt (fiq).
This is a privileged mode that is entered wheneverthe processor accepts an FIQ interrupt. Under Symbian OS, serviceroutines for FIQ interrupts execute in this mode. FIQ mode is exitedeither by writing to the CPSR, for example when returning from theinterrupt, or if another exception occurs. Under Symbian OS, thislast case should never happen, because prefetch aborts, undefinedinstructions and SWIs are prohibited in interrupt service routines, andall interrupts are masked during an FIQ service routine.212INTERRUPTS AND EXCEPTIONSThe low 5 bits of the status register (CPSR) determine which mode iscurrently active.
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