Real-Time Systems. Design Principles for Distributed Embedded Applications. Herman Kopetz. Second Edition (811374), страница 58
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This time constant characterizes the speed of a switching operation.The total energy dissipated during one switching operation is given by theintegral of the product voltage V(t) and current I(t) through the resistor over thetime period from zero to infinity.Z1E¼VðtÞIðtÞdt ¼0V2RZ11e2t=RC dt ¼ CV 220The current that flows into the capacitor builds up an electric charge in the capacitorand does not contribute to the energy dissipation.Let us set a hypothetical effective capacitance Ceff such that the term Ceff V2covers the energy needed to switch all output transitions of an average instruction ofa processor and the short circuit energy Eshort that is dissipated by the brief currentflow from the voltage source to the ground during the switching actions.Ceff ¼ C=2 þ Eshort =V 2Then the dynamic energy needed for the execution of a single instruction can beexpressed by the simple equationEdynamicinstruction ¼ Ceff V 28.1 Power and Energy195and the dynamic energy needed to run a program with N instructions is given byEdynamicprogram ¼ Ceff V 2 NIn the following the term IP-core (intellectual property core) is introduced to referto a well-specified functional unit of a system on chip (SoC).
An IP-core can be acomplete processor with local scratchpad memory or some other functional unit,such as an MPEG decoder. Let us now assume that an IP-core executes on theaverage one instruction per clock cycle and this IP-core is driven with a frequency f.Then, the dynamic power dissipation of the IP-core equalsPdynamic ¼ Ceff V 2 fExample: Assume a program of 1,000 million machine instructions that is executed on alow-power IP-core with a voltage of 1 V and where an average instruction is characterizedby an effective capacitance of 1 nF. In this example we only consider the dynamic energy.The execution of one instruction requires an energy of 1 nJ. The dynamic energy that isneeded for the execution of this program is then 1 J.
If the IP-core is driven with a frequencyof 500 MHz, then the power dissipation is 0.5 W and the program execution will take 2 s.There are different mechanisms that contribute to a steady flow of current (the leakagecurrent) between the terminals of a transistor, even if the transistor is not performingany switching action.
According to [Ped06], the most important contribution tothe leakage current in a technology which is below 100 nm is the subthresholdleakage current Isub, which increases with decreasing threshold voltage and withincreasing temperature. Another important effect is the tunnel current flowing fromthe gate into the channel, although these are separated by the non-conducting gateoxide. A quantum-mechanic effect causes electrons to tunnel through the very thinisolation, and this current grows exponentially as the oxide becomes thinner withsmaller feature sizes. The exponential growth of the leakage current with risingtemperature is of major concern in a submicron device with a low threshold voltage.This increase of the leakage current can lead to run-away thermal effects that, if notproperly controlled, end with the thermal destruction of the device.In submicron technologies, the energy dissipation caused by the static leakagecurrent can approach the same order of magnitude as the energy needed for thedynamic switching actions [Ped06].
From a system perspective it is thereforeadvantageous to structure a hardware system in such a way that subsystems canbe switched off completely if their services are not needed during short intervals.This is the topic of power gating discussed in Sect. 8.3.3.Communication. The energy requirement for the transmission of a bit stream froma sender to a receiver is highly asymmetric.
While the sender needs to generatesignals that are strong enough to reach the intended receiver, the receiver must onlysense the (weak) incoming signals.The energy needed by a sender Etx to transport a bit string of k bytes can beapproximated byEtx ðkÞ ¼ Eo þ kðEc þ 8Etr Þ1968 Power and Energy Awarenesswhile the energy needed by the receiver Erx can be approximated byErx ðkÞ ¼ Eo þ kðEc Þwhere Eo is the energy needed to set up the sending or receiving of a message and Ecis the energy dissipated by the communication controller to process 1 byte in thesender’s and receiver’s circuitry. If we assume that the setup of a transmissionrequires ten instructions and the DMA processing of one bit requires the energyequivalent for one instruction then Eo is 10 nJ and Ec is 8 nJ in our simple referencearchitecture.
In addition to the energy required for the reception of a message, areceiver needs energy during the standby period of waiting for a message to arrive.If the receive/wait ratio is small, the standby energy consumption can be substantial.The term Etr denotes the energy needed to transmit a single bit. This term isdifferent for wired and wireless communication.For a wired interconnect, this term depends on wire length d, the effectivecapacitance of the interconnect per unit length Ceffunit, and the square of voltage V:Etr ¼ dCeffunit V 2A typical value for the effective capacitance Ceffunit per unit length of an interconnect on a die is in the order of 1 pF/cm [Smi97, p.
858].If we connect two IP-cores on a System-on-Chip (SoC) by a Network-on-Chip(NoC), then we have to find a value for the network capacitance Ceff such that Ceff V2denotes the average energy consumption for the sending, transmission, and reception of a message across the network. This network capacitance Ceff depends on theimplementation technology, the size, the topology, and the control of the NoC.
In oursimple model, the energy needed for accessing the data from the sender’s memory,for the delivery of the message in the receiver’s memory, and for the transport of amessage through the NoC is considered. We assume that the sending, transmission,and receiving of a 32 bytes message across the NoC requires in the order of 500 nJ.For wireless communication, the transmit energy per bit can be approximated byEtr ¼ d2 bwhere d is the distance between the sender and the receiver.
This square relationshipbetween distance and energy is a gross approximation and must be adapted to theenergy characteristics of the concrete antenna. In many portable devices, such asmobile phones, the sender adjusts the transmit energy dynamically in order to findthe most appropriate energy level for the actual distance to the receiver.
A typicalvalue for the parameter b is given by [Hei00] as 100 pJ/(bit/m2). If we send a32 bytes message from a sender to a receiver which is 10 m away, then we need atransmit energy in the order of about 10 nJ/bit or about 2,500 nJ/bit per message.Due to partial wave reflections, the transmit power can decrease with the fourthpower of distance in terrestrial communication systems.8.1 Power and Energy197The asymmetry of the energy requirements of a sender and a receiver has adecisive influence on the design of communication protocols between a base stationthat is connected to the electric utility and an energy-constrained mobile batterypowered device.Memory.
In memory-intensive applications, the energy that is required to accessthe memory subsystems can be larger than the energy that is needed for thecomputations. The energy that is consumed by a memory subsystem consists oftwo terms. The first term is the product of the power that is consumed by an idlememory subsystem and the time the memory subsystem is powered up. This termdepends on the type and size of the memory and is different for SRAM, DRAM andnon-volatile FLASH memory. The second term consists of the product of thenumber of memory accesses and the energy requirement for a single memoryaccess. In an MPSoC that consists of a number of IP-cores that are connected bya network-on-chip (NoC) three types of memory accesses can be distinguished:lllScratchpad memory that is within an IP-core.Shared on-chip memory in a separate IP-core of the SoC.
It is accessed via the NoC.Off-chip memory, e.g., a large DRAM, that is accessed via the NoC and amemory gateway to the memory chip.The energy requirements for accessing each of these three types of memory aresubstantially different. Whereas the access for the instruction and data in thescratchpad memory is considered in the effective capacitance Ceff of an instruction,the access to the on-chip and off-chip memory requires the exchange of twomessages via the NoC: a request message containing the address to the memoryand a response message with the data from the memory. We make the grossestimate that a memory access for a 32 bytes block of on-chip memory requiresan energy in the order of 1000 nJ and access to the off-chip memory requires abouttwenty times as much, i.e., 20 mJ.I/O Devices.
The energy consumed by I/O devices such as screens, sensors andactuators is application specific (e.g., size of a screen). It can be substantial.8.1.3Thermal Effects and ReliabilityThe dissipation of electric energy in a device causes a heating of the device.The temperature rise of the device depends on the amount of energy dissipated,the heat capacity of the device, and the heat flow between the device and itsenvironment.Example: Let us assume an MPSoC with an area of 100 mm2 housing 32 IP-coresconnected by a Network-on-Chip. One of the IP-cores executes the program of the aboveexample. It is physically contained in a block of 1 mm 1 mm of a 0.5 mm thick silicondie. If we assume that this block of silicon, measuring 0.5 mm3, is thermally isolated and1988 Power and Energy Awarenessno heat can be transferred to the block’s environment, then the temperature of our siliconblock will increase by 1 C if about 815 mJ of energy are dissipated in this block.
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