Using_ModelSim (1162598), страница 2
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We compile the design and then run the simulation. Based on the resultsof the simulation, the design can be altered until it meets the desired specifications.4.1Creating a ProjectTo create a project in ModelSim, select File > New > Project.... A Create Project window shown in Figure 8 willappear.Altera Corporation - University ProgramMay 20129U SING M ODEL S IM TO S IMULATE L OGIC C IRCUITS IN V ERILOG D ESIGNSFor Quartus II 12.0Figure 8.
Creating a new project.The create project window consists of several fields: project name, project location, default library name, and copysettings field. Project name is a user selected name and the location is the directory where the source files arelocated. For our example, we choose the project name to be serial, to match the top-level module name of ourexample design, and the location of the project is the example/functional subdirectory.The default library name field specifies a name by which ModelSim catalogues designs.
For example, a set of filesthat describe the logical behaviour of components in an Altera Cyclone II device are stored in the cycloneii library.This allows the simulator to include a set of files in simulation as libraries rather than individual files, which isparticularly useful for timing simulations where device-specific data is required. For the purpose of this tutorial,specify tutorial as the library name for your project.The last field in the create project window is the copy settings field. This allows default settings to be copied fromthe initialization file and applied to your project. Now, click OK to proceed to add files to the project using thewindow shown in Figure 9.Figure 9.
Add a file to project window.10Altera Corporation - University ProgramMay 2012U SING M ODEL S IM TO S IMULATE L OGIC C IRCUITS IN V ERILOG D ESIGNSFor Quartus II 12.0The window in Figure 9 gives several options to add files to the project, including creating new files and directories,or adding existing files. Since the file for this tutorial exists, click Add Existing File and select serial.v file. Once thefile is added to the project, it will appear in the Project tab on the left-hand side of the screen, as shown in Figure 10.Figure 10. Workspace window after the project is created.Now that all design files have been included in the project, click Close to close the window in Figure 9.4.2Compiling a ProjectOnce the project has been created, it is necessary to compile it.
Compilation in ModelSim checks if the projectfiles are correct and creates intermediate data that will be used during simulation. To perform compilation, selectCompile All from the Compile menu. When the compilation is successful, a green check mark will appear to theright of the serial.v file in the Project tab.4.3SimulationTo begin a simulation of the design, the software needs to be put in simulation mode. To do this, select Simulate >Start Simulation... . The window in Figure 11 will appear.Altera Corporation - University ProgramMay 201211U SING M ODEL S IM TO S IMULATE L OGIC C IRCUITS IN V ERILOG D ESIGNSFor Quartus II 12.0Figure 11.
Start simulation mode in ModelSim.The window to start simulation consists of many tabs. These include a Design tab that lists designs available forsimulation, VHDL and Verilog tabs to specify language-specific options, a Libraries tab to include any additionallibraries, and timing and other options in the remaining two tabs. For the purposes of the functional simulation, weonly need to look at the Design tab.In the Design tab you will see a list of libraries and modules you can simulate. In this tutorial, we want to simulate amodule called serial, described in serial.v file. To select this module, scroll down and locate the tutorial library andclick on the plus (+) sign.
You will see three modules available for simulation: FSM, serial, and shift_reg. Selectthe serial module, as shown in Figure 11 and click OK to begin simulation.When you click OK, ModelSim will begin loading the selected libraries and preparing to simulate the circuit. For theexample in this tutorial, the preparation should complete quickly. Once ModelSim is ready to simulate your design,you will notice that several new tabs on the left-hand side of the screen and a new Objects window have appeared,as shown in Figure 12.12Altera Corporation - University ProgramMay 2012U SING M ODEL S IM TO S IMULATE L OGIC C IRCUITS IN V ERILOG D ESIGNSFor Quartus II 12.0Figure 12. New displays in the simulation mode.A key new tab on the left-hand side is the sim tab.
It contains a hierarchical display of design units in your circuitin a form of a table. The columns of the table include the instance name, design unit and design unit type names.The rows of the table take a form of an expandable tree. The tree is rooted in the top-level entity called serial. Eachmodule instance has a plus (+) sign next to its name to indicate it can be expanded to allow users to examine thecontents of that module instance.Expanding the top-level entity in this view gives a list of modules and/or constructs within it. For example, inFigure 12 the top-level entity serial is shown to contain an instance of the FSM module, called my_control, threeinstances of a shift_reg module, one assign statement and an always block.
Double-clicking on any of the constructswill cause ModelSim to open a source file and locate the given construct within it. Double-clicking on a moduleinstance will open a source file and point to the description of the module in the source file.In addition to showing modules and/or constructs, the sim tab can be used to locate signals for simulation.
Noticethat when the serial module is highlighted, a list of signals (inputs, outputs, and local wires) is shown in the Objectswindow. The signals are displayed as a table with four columns: name, value, kind, and mode. The name of a signalmay be preceded by a plus (+) sign to indicate that it is a bus. The top-level entity comprises signals A, B, resetn,start, and clock as inputs, a sum output and a number of internal signals.We can also locate signals inside of module instances in the design.
To do this, highlight a module whose signals youwish to see in the Objects window. For example, to see the signals in the my_control instance of the FSM module,highlight the my_control instance in the sim tab. This will give a list of signals inside of the instance as shown inFigure 13.Altera Corporation - University ProgramMay 201213U SING M ODEL S IM TO S IMULATE L OGIC C IRCUITS IN V ERILOG D ESIGNSFor Quartus II 12.0Figure 13. Expanded my_control instance.Using the sim tab and the Objects window we can select signals for simulation. To add a signal to simulation, rightclick on the signal name in the Objects window and select Add > To Wave > Selected Signals from the pop-upmenu.
Using this method, add signals A, B, resetn, start, clock, sum, and current_state to the simulation. Whenyou do so, a waveform window will appear in the work area. Once you have added these signals to the simulation,press the Undock button in the top-right corner of the waveform window to make it a separate window, as shown inFigure 14.14Altera Corporation - University ProgramMay 2012U SING M ODEL S IM TO S IMULATE L OGIC C IRCUITS IN V ERILOG D ESIGNSFor Quartus II 12.0Figure 14. A simulation window.Before we begin simulating the circuit, there is one more useful feature worth noting. It is the ability to combinesignals and create aliases. It is useful when signals of interest are not named as well as they should be, or thegiven names are inconvenient for the purposes of simulation.
In this example, we rename the start signal to go byhighlighting the start signal and selecting Tools > Combine Signals.... The window in Figure 15 will appear.Altera Corporation - University ProgramMay 201215U SING M ODEL S IM TO S IMULATE L OGIC C IRCUITS IN V ERILOG D ESIGNSFor Quartus II 12.0Figure 15. Combine signals window.In the text field labeled Result name type go and press the OK button.
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