Class B AIS transponder MA-500TR

CLASS B AIS TRANSPONDERS-14707XZ-C1Sep. 2010INTRODUCTIONCAUTIONThis service manual describes the latest technicalinformation for the MA-500TR TRANSPONDER, at the timeof publication.NEVER connect the transponder to an AC outlet or to a DCpower supply that uses more than the specified voltage.This will ruin the transponder.MODELVERSIONMA-500TR[EUR]CHANNELSPACINGTXPOWER25 kHz2W[USA][CHN]DO NOT reverse the polarities of the power supply whenconnecting the transponder.DO NOT apply an RF signal of more than 20 dBm (100 mW) tothe antenna connector. This could damage the transponder’sfront-end.To upgrade quality, any electrical or mechanical partsand internal circuits are subject to change without noticeor obligation.ORDERING PARTSREPAIR NOTESBe sure to include the following four points when orderingreplacement parts:1. Make sure that the problem is internal beforedisassembling the transponder.2.

DO NOT open the transponder until the transponder isdisconnected from its power source.3. DO NOT force any of the variable components. Turnthem slowly and smoothly.4. DO NOT short any circuits or electronic parts. Aninsulated tuning tool MUST be used for all adjustments.5. DO NOT keep power ON for a long time when thetransponder is defective.6. DO NOT transmit power into a Standard SignalGenerator or a Sweep Generator.7.

ALWAYS connect a 50 dB to 60 dB attenuator betweenthe transponder and a Deviation Meter or SpectrumAnalyzer, when using such test equipment.8. READ the instructions of the test equipment throughlybefore connecting it to the transponder.1. 10-digit Icom part number2.

Component name3. Equipment model name and unit name4. Quantity required<ORDER EXAMPLE>1110007300S.ICNJM2552V-TE1MA-500TRMAIN UNIT 5 pieces8010021740Screw 3228 CHASSISMA-500TRCHASSIS3 piecesAddresses are provided on the inside back cover for yourconvenience.Icom, Icom Inc. and the Icom logo are registered trademarks of Icom Incorporated (Japan) in Japan, the United States, theUnited Kingdom, Germany, France, Spain, Russia and/or other countries.TABLE OF CONTENTSSECTION1SPECIFICATIONSSECTION2INSIDE VIEWSSECTION3DISASSEMBLY INSTRUCTIONSECTION4CIRCUIT DESCRIPITONSECTION4-1RECEIVE CIRCUITS (MAIN UNIT) .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14-2TRANSMIT CIRCUITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24-3FREQUENCY SYNTHESIZER (MAIN UNIT) . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-34-4CPU (LOGIC UNIT; IC1) PORT ALLOCATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-44-5VOLTAGE BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . 4-45ADJUSTMENT PROCEDURES5-1PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15-2FREQUENCY ADJUSTMENTS. . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15-3TRANSMIT ADJUSTMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25-4RECEIVE ADJUSTMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . 5-4SECTION6PARTS LISTSECTION7MECHANICAL PARTSSECTION8BOARD LAYOUTSSECTION9BLOCK DIAGRAMSECTION10 VOLTAGE DIAGRAMSECTION 1.SPECIFICATIONSM GENERALM TRANSMITTER• Frequency coverage• Output power:2W• Modulation system: GMSK• Conducted Spurious emissions : Less than –36 dBm: 161.975, 162.025 MHz (default)156.025–162.025 MHz• Type of emission: 16K0GXW (GMSK)• Current drain (at 12 V nominal) : TX: 1.5 A, RX: 0.7 A• Power supply requirement: 10.8 to 15.6 V DC(negative ground)• Operating temperature range: –20°C to +60°C; –4°F to +140°F• Antenna impedance: 50 Ω nominal• Intermediate frequencyAIS1: 1st: 21.700 MHz, 2nd: 450 kHzAIS2: 1st: 30.875 MHz, 2nd: 450 kHz• Dimensions: 165(W) × 110(H) × 123.3(D) mm,(Projections not included)6 1⁄2(W) × 4 11⁄32(H) × 4 27⁄32(D) in• Weight: Approx.

1.0 kg; 2 lb 20 oz• I/O connector: High-density D-sub 15 pinM RECEIVER• Sensitivity (20% Packet Error Rate) : –110 dBm• Intermodulation rejection ratio: More than 65 dB• Spurious response rejection ratio : More than 74 dB (AIS)More than 70 dB (DSC)• Adjacent channel selectivity: More than 70 dB: Less than –57 dBm (AIS)• Conducted spurious emissionAll stated specifications are subject to change without notice or obligation.1-1SECTION 2.INSIDE VIEWS• LOGIC UNITSCHMITT TRIGGER(IC202)25 V DC-DC CONVERTER(IC151)RS232C DRIVER(IC205)PHOTO COUPLER(IC201)3.3 V REGULATOR(IC301)LCD BACKLIGHT DRIVER(Q101)EEPROM(IC2)CPU(IC1)DRAM(IC3)BPF TUNINGVOLTAGE BUFFER(IC302)CLONING DATA INTERFACE(IC252)2-1• MAIN UNITVCO-A1ST IF FILTER (CH-A)(FI201)1ST IF FILTER (CH-A)(FI202)PLL IC(IC11)IF DEMODULATOR (CH-A)(IC201)DISCRIMINATOR (CH-A)(X201)2ND IF FILTER (CH-A)(FI203)VCO-B1ST IF FILTER (CH-B)(FI101)3.3 V REGULATOR(IC601)1ST IF FILTER (CH-B)(FI102)1/2 DIVIDER(IC402)2ND IF FILTER (CH-B)(FI103)IF DEMODULATOR (CH-B)(IC101)DISCRIMINATOR (CH-B)(X101)VCO-TXAIS BASEBANDPROCESSOR(IC501)2-2SECTION 3.DISASSEMBLY INSTRUCTION• REMOVING THE LOGIC UNIT1) Remove 6 screws from the FRONT UNIT.2) Disconnect the falt cable from J3 on the LOGICUNIT, and then remove the FRONT UNIT.3) Remove 6 screws from the rear panel, and thentake out the CHASSIS from the rear panel.• REMOVING THE MAIN UNIT1) Disconnect cables from each connector (J1 and J3).2) Unsolder total of 10 points on the MAIN UNIT.3) Remove 7 screws from the MAIN UNIT, and thenremove the MAIN UNIT from the CHASSIS.FRONT UNITUnscrewUnscrewJ3UnscrewINLINECABLEUnscrewUnscrew×6UNSOLDERMAIN UNITUnscrew×6FLATCABLEChSolderremoverJ3asMAIN UNITMAIN UNITMAIN UNITUnscrewJ1sisUnscrewRear panelChassisUnscrew• REMOVING THE REG UNIT1) Remove the clip.2) Disconnect cables from each connector (J3 and J4).3) Remove 4 screws from the REG UNIT, and thenremove the REG UNIT from the CHASSIS.4) Unsolder 2 points on the LOGIC UNIT.5) Remove 7 screws from the LOGIC UNIT, and thenremove the LOGIC UNIT from the front panel.UNSOLDERSolderremoverUnscrewUnscrewUnscrewINLINECABLEDisconnectUnscrewLOGIC UNITFLATCABLEUnscrewJ4UnscrewUnscrewREG UNITLOGIC UNITFLATCABLEJ3LOGIC UNITLOGIC UNITUnscrewUnscrewClipUnscrewUnscrewFront panel3-1ChassisSECTION 4.CIRCUIT DESCRIPTION4-1 RECEIVE CIRCUITS (MAIN UNIT)The demodulated AF signal is output from pin 11, andapplied to the AIS baseband processor (IC501) through theAMP (IC202).• ANTENNA SWITCHING CIRCUITThe RF signal from the antenna is passed through the LPF(L2, L3, C3–C5), limiter (D3) and the antenna SW (D1, D2,L5, C7, C8), and then applied to the RF circuit through thesplitter (L6, L7, C11).• RF CIRCUIT (For Channel B)The RF signal from the splitter (L6, L7, C11) is passedthrough the tuned BPF (D101, L101, C103, C104), andapplied to the gate terminal of Q101, which is a part of thetuned RF AMP with D102–D105, L102, C121, C122.

Theamplified signal is filtered by the tuned BPF (D106, D107,L103, L104, C124–C130) to remove unwanted out-of-bandsignals, and then is applied to the 1st IF circuit.• RF CIRCUIT (For Channel A)The RF signal from the splitter (L6, L7, C11) is passedthrough the tuned BPF (D201, L201, C203, C204), andapplied to the gate terminal of Q201, which is a part of thetuned RF AMP with D202–D205, L202, C221, C222. Theamplified signal is filtered by the tuned BPF (D206, D207,L203, L204, C224–C230) to remove unwanted out-of-bandsignals, and then applied to the 1st IF circuit.• 1ST IF CIRCUIT (For Channel B)The filtered RF signal is applied to the 1st mixer (Q102) tobe mixed with the 1st LO signal, resulting in the 30.875 MHz1st IF signal. The signal is filtered by the crystal filters (FI101and FI102) to remove unwanted signals.

The signal isamplified by the 1st IF AMP (Q105), and then applied to the2nd IF circuit.• 1ST IF CIRCUIT (For Channel A)The filtered RF signal is applied to the 1st mixer (Q202) tobe mixed with the 1st LO signal, resulting in the 21.7 MHz1st IF signal.

The signal is filtered by the crystal filters (FI201and FI202) to remove unwanted signals. The signal isapplied to the 1st IF AMP (Q205) through the limiter (D210)and amplified, and then applied to the 2nd IF circuit.• 2ND IF CIRCUIT (For Channel B)IC101 is an IF demodulator IC which contains 2nd LOoscillator, 2nd IF mixer, limiter and quadrature detector in itspackage.• 2ND IF CIRCUIT (For Channel A)IC201 is an IF demodulator IC which contains the 2nd LOoscillator, 2nd IF mixer, limiter and quadrature detector in itspackage.The 1st IF signal is applied to pin 1 of IC101 to be mixedwith the 30.425 MHz 2nd LO signal, resulting in the 450 kHz2nd IF signal.

The 2nd LO signal is generated by theinternal 2nd LO oscillator, using the crystal resonator (X101).The 1st IF signal is applied to pin 1 of IC201 to be mixedwith the 21.25 MHz 2nd LO signal, resulting in the 450 kHz2nd IF signal.The 2nd IF signal is output from pin 3, and filtered by theceramic filter (FI103) to extract only the 450 kHz frequency,and then applied to pin 7 of IC101 to be demodulated bythe internal quadrature detector, using X102 as the phaseshifter.The 2nd LO signal is generated by the internal 2nd LOoscillator using the crystal resonator (X201).The 2nd IF signal is output from pin 3, and filtered by theceramic filter (FI203) to extract only the 450 kHz frequency,and then applied to pin 7 of IC201 to be demodulated bythe internal quadrature detector using X202 as the phaseshifter.The demodulated AF signal is output from pin 11 of IC201and IC101, and applied to the AIS baseband processor(IC501), through the AMPs (IC102, IC202).• FROM THE ANTENNA TO 2ND IF CIRCUITFI103IC102To the AIS baseband processorX102450kHzAMPChannel BCERAMICBPFBPFBVFI101,FI102Q105FMDET2ndIFAM P2ndLoBUFFIF demodulator ICIC101X202450kHzBPF30.875 MHzD102-D107BPFBPFBVQ205IFAMP2ndIX2ndLoBUFFSPLITTERD3D1,D2LIMITANTSWLPFD101Channel ACERAMICBPF2ndIFAM PMRFAMPFrom the TX circuitsIC201FMDETXTALBPFX10130.425 MHzFI203IC202To the decoderAMPQ101Q102IFAMP2ndMIXBPFBVD210FI201,FI202LIMITTERXTALBPFBPF21.7 MHzD202-D207Q201Q202X20121.25 MHz4-1BPFBVRFAMPBPFD201• GPS DATA INPUT(From the [NMEA IN/OUT] connector; REG UNIT)The MA-500TR has three pairs of NMEA I/O ports;"NMEA1I+/–", "NMEA2I+/–" and "NMEA3I+/–," and acceptsthird party GPS equipment.

The NMEA signal from the[NMEA IN/OUT] connector is passed through the currentregulator circuits (REG UNIT; D201–D206), level-convertedby the insulated photo couplers (IC204–IC206), adjusted inwaveform by the Schmitt trigger (IC212), down-convertedfrom 5 Vp-p to 3.3 Vp-p by R226, R227, R236, R237, R246and R247, and then applied to the CPU (LOGIC UNIT; IC1)"RXD1_N" "RXD2" "RXD3" signals to be processed.• AIS DATA DECODING CIRCUITSThe demodulated signals from the IF demodulator (IC101 orIC201) are applied to the AIS baseband processor (IC501),and then decoded into the AIS data by the internal GMSKdecoder.The AIS data signal is output from the AIS basebandprocessor (IC501) as serial data, and then applied to theCPU (LOGIC UNIT; IC1). The CPU processes the input dataand sends the position information to the display.The data is output from the CPU and up-converted from3.3Vp-p to 5Vp-p by IC211 and converted into a NMEAsignal by the RS-424 line drivers (IC201–IC203).