3_NanoSCFabrication_chap4 (Лекции Цветкова), страница 2

in Siequilibrium impurity conc. in SiO 2There are two general cases to consider:1. m>1 Impurity tends to remain in silicon as oxide grows.Ex: As, P, Sb, m≈102. m<1 Impurity tends to incorporate into oxide.Ex: B, m ≈0.3Profiles of dopant in the oxide and silicon also depend on diffusion rateof impurity in the oxide.Nano-SOI Process LaboratoryHanyang University27Impurity segregation during oxide growth(a) Diffusion inoxide slow (boron)(c) Diffusion in oxideslow (phosphorus)(b) Diffusion inoxide fast (boronH2 ambient)(d) Diffusion in oxidefast (gallium)[Chap.3] Fig.17 Impurity segregation at the Si-SiO2 interface resulting fromthermal oxidation.Nano-SOI Process LaboratoryHanyang University28Oxidation induced stacking faulis (OSF)During thermal oxidation, a volume expansion takes place.Recall that we have :And2.2X1022 Si atoms/cm3 in SiO2 = 4.55X10-23 cm3/Si atom5X1022 Si atoms/cm3 in Si = 2X10-23 cm3/Si atomIn effect, there are excess Si atoms left over from oxidation.These excess atoms can be accommodated by either:• Annihilation with vacancies form Si• Diffusion into Si crystalNano-SOI Process LaboratoryHanyang University29Oxidation induced stacking faulis (OSF)Excess Si atoms injected into substrate can coalesce on existingnucleation Sites:- Damage- Metallic impurities- Other defectsLeading to -> Stacking fault growthOSF growth is a complex function of:(100) > (111)Wet ox > Dry oxN-type > P-typeSubstrate orientation, conductivity type, defect level, oxidizing ambient,and oxidizing temperature.Defect density → O.I.S.F growth ↑Under certain conditions, retrogrowth (shrinkage) may occur.Stacking faults can degrade device performance.Nano-SOI Process LaboratoryHanyang University30Growth of OSF vs.

oxidation temperatureRetro-growthregionGrowth region[Chap.3] Fig.19 Growth of oxidation-induced stacking faults versus temperaturefor 3h of dry oxidationNano-SOI Process LaboratoryHanyang University31Masking properties of oxide• SiO2 is frequently used as adiffusion mask, or ion implantationmask.• To be effective as a mask, a sufficient thickness of SiO2must be used.- Diffusion mask : Consider diffusion coefficient in SiO2at desired temperature- Implant Mask : Consider range of the implanted ion inSiO2, and diffusion coefficientNano-SOI Process LaboratoryHanyang University32Pre-oxidation cleaningOxidation is typically a high temperature process.Wafers must be free of impurities before oxidation.••••Organics: oils, etcInorganics: metals, Na+Particulates: misc.

sourcesDopantsSerious problems may occur from relatively low contamination levels:- Dopants 5X1015/cm3- Metals ~1013/cm3 (ppb)- Na+ 1010/cm2 ~ 10-5 monolayersA variety of cleaning techniques have evolved.Let’s look at a typical example.Nano-SOI Process LaboratoryHanyang University33RCA clean1. NH4OH:H2O2:H2O 5-10min. 75-85°COrganic removal, complexing of metals2. DI H2O rinse 5min.3. 10:1 HF dip 10 seconds (optional) oxide removal4. DI H2O rinse 5min.5.

HCl:H2O2:H2O 75-85°CHeavy metal removal6. DI H2O rinse 5min.7. Spin drySome variation on this theme exists.Other cleaning solution are used:H2SO4:H2O2 – organics, photoresistHNO3:HF – Si EtchantHF or BOE (Buffered oxide etch) – SiO2 removalAcetone, Methanol, Isopropyl – organic solventsNano-SOI Process LaboratoryHanyang University34Oxidation techniques and systemsBasic growth techniquesThin oxide growth• Dry O2 + HClThick oxide growth• H2O via 2H2+O2→2H2O (Pyrogenic stream)• O2 or N2 bubbled through H2O at 95°CSystems:• Horizontal tube furnace• Vertical tube furnace• Rapid thermal oxidationNano-SOI Process LaboratoryHanyang University35Typical four stack oxidation furnaceSchematic cross section of a resistance-heated oxidation furnace.Nano-SOI Process LaboratoryHanyang University36Furnace(a) Horizontal furnaceNano-SOI Process Laboratory(b) Vertital furnaceHanyang University37Growth of device quality oxides requires..Growth of device quality oxides requires precise control ofprocess variables:••••Temperature uniformity within 1°CGas flow control (Mass flow controllers)Prevention of wafer warpage (Temp.

ramp rate)Gas purity 5 or 6 (9’s purity=99.999% to 99.9999%)Nano-SOI Process LaboratoryHanyang University38Typical oxidation cycle1. Load wafers2. Boat insertion in inert gas (N2 or Ar)3. Temperature ramp-up4. Oxidize5. Post-Oxidation anneal (N2 or Ar) for control of electricalproperties6. Temperature ramp down7. Boat removal8. Wafer unloading in inert gas (N2 or Ar)Nano-SOI Process LaboratoryHanyang University39Rapid thermal oxidationSimilar to conventional oxidation.Difference: Heating via IR lamps in cold walled systemRapid heating rates: 100’s °C/secondRapid cooling ratesSingle wafer systemsVery short oxidation times are possible:~5sec.Problems:Stress effects, uniformity, temperature control.Nano-SOI Process LaboratoryHanyang University40Plasma oxidationKey advantage: low oxidation temperature (400°C-700°C)Vacuum process-compatible with other low pressureprocessesPlasma may be RF or microwaveDownstream microwave plasma oxidation has beendemonstrated.Oxide quality can be a problems – large variation.Nano-SOI Process LaboratoryHanyang University41Oxide propertiesStructural and electrical properties depend on oxidationtechnique and conditions.Oxide density and refractive index for example:Depend on :Dry vs.

WetAtmospheric vs. High pressureOxidation temperatureElectrical properties are a strong function of oxide growthconditions.These properties will be discussed along with annealing in afuture lecture.Nano-SOI Process LaboratoryHanyang University42Oxide thickness measurementsOf the many oxide properties,thickness is most fundamental androutinely measured.A variety of techniques can be usedto measure oxide (or other film)thickness.• Visual observation of color: when viewed normal to the surface,a distinct color is visible. The colorgives a good indication of oxidethickness.Nano-SOI Process LaboratoryHanyang University43Oxide thickness measurements• Mechanical techniquesStep height measurement: Tallystep, AlphastepStylus• Weight gain method• Interferometry (Nanometrics)Intensity of reflected lightCurve fit for known properties of SiO2.Also works for other films.

Gives thickness only.Nano-SOI Process LaboratoryHanyang University44EllipsometryLight sourceFilterPolarizerQuarterwave plateDetectorφSubstrateNano-SOI Process LaboratoryAnalyzerFilm being measuredHanyang University45EllipsometryVery accurate, most versatile method.Thickness: Measurement gives periodic thickness solutions need to knowsomething about film, or perform multiple wavelengthmeasurement.Thickness andRefractive index: Can determine the thickness and refractive index offilms of different materials.Not accurate near thickness order.Multiple films: Can determine thickness of stacked films using multiplewavelengths or angles.Reference: R.J.Archer, J.Optical Soc.of America, 52, 970 (1962)Nano-SOI Process LaboratoryHanyang University46Future of oxidationThinner oxides are needed~7.5nm for 0.25μm CMOSLow temperature or short time needed to minimize dopantredistribution- Rapid thermal oxidation- Plasma oxidationHigh pressure oxidationThick oxides at moderate temperature.

(No OSF)Nano-SOI Process LaboratoryHanyang University47Advanced Oxidation ProcessNano-SOI Process LaboratoryHanyang University48Advanced Oxidation ProcessNano-SOI Process LaboratoryHanyang University49High-k Gate Dielectric CandidatesNano-SOI Process LaboratoryHanyang University50High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University51High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University52High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University53High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University54High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University55High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University56High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University57High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University58High-k Gate DielectricsNano-SOI Process LaboratoryHanyang University59.