Лекция 4 - MIPS_2 (Слайды лекций)

MIPS processor continuedReview• Different parts in the processor should beconnected appropriately to be able to carryout the functions.• Connections depending on what we need• Learnt R-type, lw, sw, beqlw & sw?Data path only for lw and sw (answer)Data path for both R-type andmemory-type instructionsadd $rd, $rs, $rt, format: opcode (6 bits) rs (5 bits) rt (5 bits) rd (5 bits) 00000 funct (6 bits)lw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits)sw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits)Data path for both R-type andmemory-type instructionsadd $rd, $rs, $rt, format: opcode (6 bits) rs (5 bits) rt (5 bits) rd (5 bits) 00000 funct (6 bits)lw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits)sw $rt, offset_value($rs): opcode (6 bits) rs (5 bits) rt (5 bits) offset (16 bits)AnswerDatapath for R-type, memory, andbranch operationsDatapath for R-type, memory, andbranch operations (Answer)Datapath for Memory, R-type and BranchInstructions, plus the control signalsJump Instruction• Jump instruction seems easy to implement– We just need to replace the lower 28 bits of thePC with the lower 26 bits of the instruction shiftedby 2 bits• The shift is achieved by simply concatenating 00 to thejump offset11/15/2007 5:02:11 PMweek-13-3.ppt11Implementing Jumps• The one we have supports arithmetic/logicinstructions, branch instructions, load andstore instructions– We need also to support the jump instruction3126 2500 0 0 0 1 0opcodeAddress– What are the changes we need to make?12Add j?Supporting Jump Instruction14In Class Exercise – Supporting JumpRegister11/25/2007 10:54:43 PMweek-14-1.ppt15.